Rev Age Author Path Log message Diff
1753 5027 d 19 h kakl /Modules/TDC/GP201A/SW/PICinterface/ zakonzervovani kodu pred vytvorenim funkci pro nastaveni TDC. Diff
1751 5029 d 18 h kaklik / zaznam nalezenych chyb Diff
1745 5032 d 19 h kakl /Modules/TDC/GP201A/SW/PICinterface/ prvni verze funkcni komunikace s TDC. Zbyva doresit nastavovani registru. Diff
1744 5033 d 12 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 5034 d 12 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 5034 d 22 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 5035 d 1 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 5035 d 21 h kakl /Modules/ opravy PCB Diff
1739 5036 d 13 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 5037 d 13 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 5037 d 14 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 5037 d 15 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 5039 d 22 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 5049 d 19 h kaklik / Opravy a doplneni Diff
1717 5050 d 14 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 5050 d 20 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 5051 d 3 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 5051 d 23 h kaklik / priprava novych modulu. Diff
1712 5052 d 13 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5052 d 13 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff