| 1809 |
5035 d 2 h |
kaklik |
/ |
drobné úpravy a vygenerování technologických výstupů |
Diff |
| /Modules/Clock/CLKGEN01B/CAM_DOC/CLKGEN.pdf |
/Designs/HAM Constructions/SDRX01B/CAM_DOC/SDRX.pdf
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/DRILL.DRL
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/DRILL.lst
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/M1.PHO
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/M2.PHO
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/T1.PHO
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/V1.PHO
/Designs/HAM Constructions/SDRX01B/CAM_PROFI/V2.PHO
/Designs/HAM Constructions/SDRX01B/PCB/SDRX.pcb
/Modules/Clock/CLKGEN01B/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKGEN01B/CAM_PROFI/M2.PHO
/Modules/Clock/CLKGEN01B/CAM_PROFI/T1.PHO
/Modules/Clock/CLKGEN01B/CAM_PROFI/V1.PHO
/Modules/Clock/CLKGEN01B/CAM_PROFI/V2.PHO
/Modules/Clock/CLKGEN01B/PCB/CLKGEN.pcb |
|
| 1808 |
5035 d 16 h |
kaklik |
/Modules/Clock/CLKGEN01B/PCB/ |
přidání prokovů |
Diff |
| /Modules/Clock/CLKGEN01B/PCB/CLKGEN.pcb |
|
| 1802 |
5037 d 3 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
upravy ve vyliti medi. |
Diff |
/Modules/ARM/STM32F10xRxT/CAM_PROFI/M2.PHO
/Modules/ARM/STM32F10xRxT/CAM_PROFI/V2.PHO
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb |
|
| 1801 |
5037 d 4 h |
kaklik |
/Modules/Sensors/ |
prejmenovani dokumentacni slozky GSENSE01A |
Diff |
| /Modules/Sensors/GSENSE01A |
| /Modules/Sensors/MMA7260 |
|
| 1800 |
5037 d 4 h |
kaklik |
/Modules/Sensors/MMA7260/DOC/ |
|
Diff |
| /Modules/Sensors/MMA7260/DOC/GSENSE01A.pdf |
|
| 1799 |
5037 d 4 h |
kaklik |
/Modules/PIC/PICPROGUSB02A/DOC/ |
oprava nadpisu |
Diff |
/Modules/PIC/PICPROGUSB02A/DOC/PICPROGUSB02A.pdf
/Modules/PIC/PICPROGUSB02A/DOC/SRC/PICPROGUSB02A.doc |
|
| 1798 |
5041 d 1 h |
kaklik |
/ |
aktualizace schemat v PDF. |
Diff |
| /Modules/Sensors/HUM01A/CAM_AMA/V2.pdf |
/Designs/HAM Constructions/SDRX01A/SCH/AMP.pdf
/Designs/HAM Constructions/SDRX01A/SCH/MIXER.pdf
/Designs/HAM Constructions/SDRX01A/SCH/PHASER.pdf
/Designs/HAM Constructions/SDRX01A/SCH/POWER.pdf
/Designs/HAM Constructions/SDRX01A/SCH/sdrx.opj
/Designs/HAM Constructions/SDRX01B/SCH/AMP.pdf
/Designs/HAM Constructions/SDRX01B/SCH/MIXER.pdf
/Designs/HAM Constructions/SDRX01B/SCH/PHASER.pdf
/Designs/HAM Constructions/SDRX01B/SCH/POWER.pdf
/Designs/HAM Constructions/SDRX01B/SCH/sdrx.opj
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt |
|
| 1797 |
5044 d 5 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
uprava potisku |
Diff |
/Modules/ARM/STM32F10xRxT/CAM_PROFI/T1.PHO
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb |
|
| 1796 |
5044 d 6 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
aktualizace vyrobnich dat. |
Diff |
/Modules/ARM/STM32F10xRxT/CAM_DOC/STM32F10XRXT.pdf
/Modules/ARM/STM32F10xRxT/CAM_PROFI/M2.PHO
/Modules/ARM/STM32F10xRxT/CAM_PROFI/T1.PHO
/Modules/ARM/STM32F10xRxT/CAM_PROFI/V2.PHO
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb |
|
| 1795 |
5044 d 16 h |
kaklik |
/Modules/CommSerial/ETH01A/ |
zacatek navrhu PCB. |
Diff |
/Modules/CommSerial/ETH01A/PCB
/Modules/CommSerial/ETH01A/PCB/ETH01.pcb |
/Modules/CommSerial/ETH01A/SCH/ETH01.DSN
/Modules/CommSerial/ETH01A/SCH/ETH01.opj |
|
| 1794 |
5044 d 19 h |
kaklik |
/Modules/CommSerial/ETH01A/SCH/ |
doklesleno schema. |
Diff |
/Modules/CommSerial/ETH01A/SCH/ETH01.DSN
/Modules/CommSerial/ETH01A/SCH/ETH01.opj |
|
| 1793 |
5045 d 22 h |
kaklik |
/Modules/CommSerial/ETH01A/SCH/ |
dokresleni schema casti na PoE.
Jeste je treba prekleslit pripojeni RJ45 konektoru. |
Diff |
/Modules/CommSerial/ETH01A/SCH/ETH01.DSN
/Modules/CommSerial/ETH01A/SCH/ETH01.opj |
|
| 1792 |
5045 d 23 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/SCH/ |
Ještě pracovní knihovna projektu S3AN01A |
Diff |
| /Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.OLB |
|
| 1791 |
5045 d 23 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
Created FPGA module (school board) for XILINX Spartan 3 XC3S50AN gate array S3AN01A |
Diff |
/Modules/CPLD_FPGA/S3AN01A
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/T1_AMA.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/V2_AMA.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/V2_REAL.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/Drill.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/V2.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/M2.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/P2.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/T1.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/V2.PHO
/Modules/CPLD_FPGA/S3AN01A/PCB
/Modules/CPLD_FPGA/S3AN01A/PCB/S3AN01A.pcb
/Modules/CPLD_FPGA/S3AN01A/PrjInfo.txt
/Modules/CPLD_FPGA/S3AN01A/SCH
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.ASC
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.DSN
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_BOM.xls
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_SCH.pdf |
|
| 1790 |
5045 d 23 h |
miho |
/Modules/ |
Přejmenování podstromu CPLD na CPLD_FPGA |
Diff |
| /Modules/CPLD_FPGA |
/Modules/CPLD
/Modules/CPLD_FPGA/ISPLSI1016A/SCH/ISPLSI1016A.DBK
/Modules/CPLD_FPGA/ISPLSI1016A/SCH/ISPLSI1016A.ONL
/Modules/CPLD_FPGA/ISPLSI1016A/SCH/LATTICE.OBK
/Modules/CPLD_FPGA/ISPLSI1016A/SCH/isplsi1016a.opj |
| /Modules/CPLD_FPGA/DirInfo.txt |
|
| 1789 |
5046 d 5 h |
miho |
/ |
Vygenerované podklady pro amatérskou výrobu plošných spojů. |
Diff |
/Library/Films/MULTI_14.pdf
/Modules/HumanInterfaces/LCD2L4P02A/CAM_AMA/V2_AMA.pdf |
|
| 1786 |
5052 d 17 h |
kaklik |
/Modules/Translators/TTLPECL01A/ |
vygenerovani technologickych vystupu |
Diff |
/Modules/Translators/TTLPECL01A/CAM_PROFI/BOARD.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/DRILL.DRL
/Modules/Translators/TTLPECL01A/CAM_PROFI/M2.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/T1.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/V2.PHO |
| /Modules/Translators/TTLPECL01A/PCB/TTLPECL.pcb |
|
| 1785 |
5052 d 17 h |
kaklik |
/Modules/Translators/TTLPECL01A/PCB/ |
|
Diff |
| /Modules/Translators/TTLPECL01A/PCB/TTLPECL.pcb |
|
| 1784 |
5052 d 18 h |
kaklik |
/ |
zacatek navrhu spoje. |
Diff |
| /Modules/Translators/TTLPECL01A/PCB/TTLPECL.pcb |
| /Designs/HAM Constructions/SDRX01B/SCH/sdrx.opj |
|
| 1783 |
5052 d 22 h |
kaklik |
/Modules/Translators/TTLPECL01A/DOC/ |
Zalozena nоvá třída modulů pro převod signálových úrovní. |
Diff |
/Modules/Translators/TTLPECL01A/DOC/SY100ELT22L.pdf
/Modules/Translators/TTLPECL01A/DOC/SY100elt23l.pdf |
|