Rev 1894 – ?author? – ?age? (?date?)
?log?
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Modules/
@ 1936
Rev 1894
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Log message
Diff
1855
5020 d 20 h
kaklik
/Modules/CommSerial/ETH01A/PCB/
Dokončena hlavní část návrhu PCB.
Diff
1854
5021 d 9 h
kaklik
/
drobná SEO oprimalizace podle návrhu google.
Diff
1852
5021 d 21 h
kaklik
/Modules/CommSerial/ETH01A/SCH/
Diff
1851
5021 d 21 h
kaklik
/Modules/CommSerial/ETH01A/
pokracovani v navrhu PCB pro ethernet.
Diff
1850
5021 d 22 h
kaklik
/Modules/CommSerial/ETH01A/PCB/
Diff
1849
5021 d 23 h
kaklik
/Modules/CommSerial/ETH01A/PCB/
pokracovani v navrhu PCB pro ethernet.
Diff
1848
5021 d 23 h
kaklik
/Modules/CommSerial/ETH01A/
vyreseno krizeni spoju
Diff
1847
5022 d 0 h
kaklik
/Modules/CommSerial/ETH01A/
navrh PCB pro ethernet.
Diff
1846
5022 d 1 h
kaklik
/Modules/CommSerial/ETH01A/
navrh PCB pro ethernet.
Diff
1845
5022 d 1 h
kaklik
/Modules/CommSerial/ETH01A/
navrh PCB pro ethernet.
Diff
1844
5022 d 2 h
kaklik
/Modules/
Diff
1843
5022 d 3 h
kaklik
/Modules/CommSerial/ETH01A/PCB/
navrh PCB pro ethernet.
Diff
1842
5022 d 3 h
kaklik
/Modules/CommSerial/ETH01A/PCB/
navrh PCB pro ethernet.
Diff
1841
5022 d 21 h
kaklik
/Modules/Clock/CLKGEN01B/DOC/
aktualizace dokumentce.
Diff
1840
5022 d 21 h
kaklik
/
aktualizace dokumentce.
Diff
1839
5023 d 1 h
kaklik
/Modules/Clock/CLKGEN01B/
zacatek dokumentace
Diff
1838
5023 d 7 h
kaklik
/
zacatek dokumentace
Diff
1834
5025 d 3 h
kaklik
/Modules/PIC/PIC18F8xTQ8001A/
aktualizace fotografií.
Diff
1833
5025 d 4 h
kaklik
/
aktualizace fotografií.
Diff
1832
5026 d 20 h
kaklik
/Modules/Clock/CLKGEN01B/
nove fotky modulu
Diff