| 1935 |
4952 d 11 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/SCH/ |
Aktualizace schématu (formální změny). Pracovní verze seznamu součástek. |
Diff |
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_BOM.xls
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_SCH.PDF |
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.ASC
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.DSN |
|
| 1934 |
4953 d 1 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
kus anglickeho prekladu |
Diff |
| /Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.en.pdf |
| /Modules/Clock/CLKGEN01B/DOC/CLKGEN.en.pdf |
|
| 1933 |
4953 d 1 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
kus anglickeho prekladu |
Diff |
| /Modules/Clock/CLKGEN01B/DOC/CLKGEN.en.pdf |
|
| 1932 |
4955 d 4 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
prejmenovani podle konvence |
Diff |
| /Modules/Clock/CLKGEN01B/DOC/DG8SAQ_emulator.cs.pdf |
| /Modules/Clock/CLKGEN01B/DOC/DG8SAQ_emulator.pdf |
|
| 1931 |
4957 d 20 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
testovani TDC |
Diff |
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt |
|
| 1930 |
4958 d 0 h |
kaklik |
/ |
preklad kodu |
Diff |
/Designs/Tools/reflow2/SW/reflow.PJT
/Designs/Tools/reflow2/SW/reflow.hex |
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt |
|
| 1914 |
4968 d 4 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
Vygenerovani potisku |
Diff |
| /Modules/CommSerial/ETH02A/CAM_AMA/T1.pdf |
| /Modules/CommSerial/ETH02A/PCB/ETH02.pcb |
|
| 1913 |
4968 d 4 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
prace na modulu pro ethernet |
Diff |
/Modules/CommSerial/ETH02A/CAM_AMA/V2.pdf
/Modules/CommSerial/ETH02A/CAM_PROFI/V2.PHO
/Modules/CommSerial/ETH02A/PCB/ETH02.pcb |
|
| 1912 |
4968 d 5 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
prace na modulu pro ethernet |
Diff |
/Modules/CommSerial/ETH02A/CAM_AMA/V2.pdf
/Modules/CommSerial/ETH02A/CAM_PROFI/BOARD.PHO
/Modules/CommSerial/ETH02A/CAM_PROFI/DRILL.DRL
/Modules/CommSerial/ETH02A/CAM_PROFI/V2.PHO |
/Modules/CommSerial/ETH02A/PCB/ETH02.pcb
/Modules/CommSerial/ETH02A/SCH/ETH02.DSN
/Modules/CommSerial/ETH02A/SCH/ETH02.opj |
|
| 1911 |
4968 d 22 h |
kaklik |
/Modules/ |
Vyvoj tistaku pro ETHERNET. |
Diff |
/Modules/CommSerial/ETH02A/PCB/ETH02.pcb
/Modules/CommSerial/ETH02A/SCH/ETH02.opj
/Modules/PowerSupply/klimma/Design5.opj |
|
| 1910 |
4969 d 23 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
nalezene chyby |
Diff |
| /Modules/ARM/STM32F10xRxT/opravit.txt |
|
| 1908 |
4971 d 18 h |
klimma |
/Modules/PowerSupply/klimma/ |
|
Diff |
/Modules/PowerSupply/klimma
/Modules/PowerSupply/klimma/DESIGN5.DSN
/Modules/PowerSupply/klimma/Design5.opj |
|
| 1907 |
4971 d 23 h |
kaklik |
/Modules/PowerSupply/MC3406301A/pdf/ |
dokumentace |
Diff |
/Modules/PowerSupply/MC3406301A/pdf
/Modules/PowerSupply/MC3406301A/pdf/MC34063A-D.PDF |
|
| 1906 |
4973 d 10 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A doplnění obrázků |
Diff |
/Modules/CPLD_FPGA/S3AN01A/DOC
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát1.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát2a.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát2b.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Bot_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Top_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Top_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/S3AN01A_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/S3AN01A_Top_Small.jpg |
|
| 1899 |
4974 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A je již zastaralá konstrukce |
Diff |
| /Modules/CPLD_FPGA/S3AN01A/PrjInfo.txt |
|
| 1898 |
4974 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/ |
S3AN01B revize desky S3AN01A (s opravami) |
Diff |
/Modules/CPLD_FPGA/S3AN01B
/Modules/CPLD_FPGA/S3AN01B/CAM_AMA
/Modules/CPLD_FPGA/S3AN01B/CAM_AMA/T1_AMA.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_AMA/V2_AMA.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_AMA/V2_DOC.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_AMA/V2_REAL.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_DOC
/Modules/CPLD_FPGA/S3AN01B/CAM_DOC/DRILL.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/!____!.txt
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/M2.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/P2.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/T1.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/S3AN01B/CAM_PROFI/V2.PHO
/Modules/CPLD_FPGA/S3AN01B/PCB
/Modules/CPLD_FPGA/S3AN01B/PCB/S3AN01B.pcb
/Modules/CPLD_FPGA/S3AN01B/PrjInfo.txt
/Modules/CPLD_FPGA/S3AN01B/SCH
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.ASC
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.DSN
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.OLB
/Modules/CPLD_FPGA/S3AN01B/VHDL |
|
| 1897 |
4974 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/SCH/ |
S3AN01A doplněny texty |
Diff |
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.DSN
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_SCH.pdf |
|
| 1896 |
4978 d 0 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. |
Diff |
/Modules/CPLD_FPGA/S3AN01A/PCB/S3AN01A.pcb
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.ASC
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.DSN
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_BOM.xls
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_SCH.pdf |
|
| 1894 |
4978 d 19 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
|
Diff |
/Modules/CommSerial/ETH02A/PCB/ETH02.pcb
/Modules/CommSerial/ETH02A/SCH/ETH02.opj |
|
| 1892 |
4987 d 19 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
zacatek kresleni PCB |
Diff |
| /Modules/CommSerial/ETH02A/PCB/ETH02.pcb |
/Modules/CommSerial/ETH02A/SCH/ETH02.DSN
/Modules/CommSerial/ETH02A/SCH/ETH02.opj |
|