Rev Age Author Path Log message Diff
1931 4844 d 23 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ testovani TDC Diff
1930 4845 d 3 h kaklik / preklad kodu Diff
1914 4855 d 7 h kaklik /Modules/CommSerial/ETH02A/ Vygenerovani potisku Diff
1913 4855 d 7 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1912 4855 d 8 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1911 4856 d 1 h kaklik /Modules/ Vyvoj tistaku pro ETHERNET. Diff
1910 4857 d 2 h kaklik /Modules/ARM/STM32F10xRxT/ nalezene chyby Diff
1908 4858 d 21 h klimma /Modules/PowerSupply/klimma/ Diff
1907 4859 d 1 h kaklik /Modules/PowerSupply/MC3406301A/pdf/ dokumentace Diff
1906 4860 d 13 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A doplnění obrázků Diff
1899 4861 d 5 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A je již zastaralá konstrukce Diff
1898 4861 d 5 h miho /Modules/CPLD_FPGA/S3AN01B/ S3AN01B revize desky S3AN01A (s opravami) Diff
1897 4861 d 5 h miho /Modules/CPLD_FPGA/S3AN01A/SCH/ S3AN01A doplněny texty Diff
1896 4865 d 3 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. Diff
1894 4865 d 21 h kaklik /Modules/CommSerial/ETH02A/ Diff
1892 4874 d 22 h kaklik /Modules/CommSerial/ETH02A/ zacatek kresleni PCB Diff
1891 4874 d 23 h kaklik /Modules/ schema modulu s ehternet konektorem. Diff
1890 4877 d 3 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1888 4877 d 5 h kaklik / vygenerevani osazovaku Diff
1887 4882 d 3 h kaklik /Modules/CommSerial/ založen nový modul s ethernet konektorem. Diff