Rev Age Author Path Log message Diff
2357 4673 d 10 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ exportovano v jinem formatu Diff
2356 4673 d 11 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ aktualizace vzhledem k aktualnimu stavu. Diff
2353 4673 d 12 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ uklid a vygenerovani prvniho QRcode. Diff
2352 4673 d 12 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ uklid a vygenerovani prvniho QRcode. Diff
2351 4673 d 12 h kaklik /Modules/Translators/TTLPECL01A/ uklid a vygenerovani prvniho QRcode. Diff
2350 4675 d 0 h kaklik / uklid Diff
2344 4692 d 8 h kaklik /Modules/CommSerial/USB232R01B/pdf/ pridani datasheetu k FT232RL Diff
2343 4695 d 12 h mija /Modules/CommRF/ANT01/ upravena izolacni vzdalenost z 5 milsu na 6 milsu (0,152mm) Diff
2342 4697 d 4 h kaklik /Modules/PowerSW/NFET4X01B/SCH/ aktualizace schematu modulu. Diff
2341 4698 d 3 h kaklik /Modules/PowerSW/NFET4X01B/ aktualizace modulu s vykonovymi spinaci. Diff
2339 4701 d 7 h kaklik /Modules/CommRF/LNA01A/SCH/ Diff
2338 4710 d 8 h miho /Modules/CPLD_FPGA/ Opravena cesta k ikoně Diff
2337 4710 d 9 h miho /Modules/CPLD_FPGA/S3AN01B/DOC/HTML/ Doplněna HTML verze dokumentace pro S3AN01B Diff
2336 4710 d 10 h miho /Modules/CPLD_FPGA/S3AN01B/ Aktualizovaná HW dokumentace desky S3AN01B s obvodem FPGA XILINX Sparatn3AN Diff
2335 4711 d 2 h miho /Modules/CPLD_FPGA/S3AN01B/DOC/SRC/ Rozepsaná dokumentace pro FPGA desku S3AN01B Diff
2328 4719 d 2 h kaklik /Modules/ zapis nalezenych chyb Diff
2326 4724 d 1 h kaklik / uklid obrazku. Diff
2325 4724 d 2 h kaklik / Diff
2324 4724 d 2 h kaklik /Modules/PowerSW/PWMLED01A/DOC/SRC/ uklid Diff
2323 4724 d 2 h kaklik / vytvoreni prazdnych slozek na fotografie. Diff