Rev Age Author Path Log message Diff
1542 5175 d 20 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5176 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5176 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5176 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5179 d 10 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5179 d 16 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5180 d 6 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1531 5193 d 9 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5193 d 16 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5193 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5193 d 18 h kaklik /Modules/ Diff
1527 5193 d 20 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5194 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5194 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5194 d 15 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5194 d 15 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
1522 5195 d 13 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
1521 5197 d 11 h kaklik /Modules/ schema modulu pro generovani hodin. Diff
1520 5198 d 11 h kaklik /Modules/Clock/ popisek modulu. Diff
1519 5198 d 11 h kaklik /Modules/ popisek modulu. Diff