Rev Age Author Path Log message Diff
1551 5240 d 17 h kaklik / prvni SDR konstrukce. Diff
1548 5249 d 20 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5249 d 21 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5252 d 18 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5252 d 19 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5253 d 20 h kaklik / Diff
1543 5253 d 20 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5253 d 22 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5254 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5254 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5254 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5257 d 11 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5257 d 18 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5258 d 8 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1531 5271 d 10 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5271 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5271 d 19 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5271 d 20 h kaklik /Modules/ Diff
1527 5271 d 21 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5272 d 12 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff