Rev Age Author Path Log message Diff Changes
1545 5113 d 18 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
/Modules/Clock/CLKGEN01A/CAM_AMA/T1.pdf
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1544 5114 d 18 h kaklik / Diff
/Modules/Clock/CLKGEN01A/CAM_AMA/V2.pdf
/Library/Templates/PADS/DEFAULT_v4.cam
1543 5114 d 19 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
/Modules/Clock/CLKGEN01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1542 5114 d 20 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
/Modules/Clock/CLKGEN01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKGEN01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1541 5115 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1540 5115 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1539 5115 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1538 5118 d 10 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
/Modules/Clock/CLKHUB01A/PCB/CLKHUB_blz.pcb
/Modules/Clock/CLKHUB02A
/Modules/Clock/CLKHUB02A/CAM_AMA
/Modules/Clock/CLKHUB02A/CAM_DOC
/Modules/Clock/CLKHUB02A/CAM_PROFI
/Modules/Clock/CLKHUB02A/DOC
/Modules/Clock/CLKHUB02A/DOC/HTML
/Modules/Clock/CLKHUB02A/DOC/SRC
/Modules/Clock/CLKHUB02A/PCB
/Modules/Clock/CLKHUB02A/PCB/CLKHUB.pcb
/Modules/Clock/CLKHUB02A/SCH
/Modules/Clock/CLKHUB02A/SCH/CLKHUB.DSN
/Modules/Clock/CLKHUB02A/SCH/CLKHUB.asc
/Modules/Clock/CLKHUB02A/SW
/Modules/Clock/CLKHUB01A/PCB/CLKHUB.pcb
1537 5118 d 16 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
/Modules/Clock/CLKHUB01A/PCB/CLKHUB.pcb
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.DSN
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.asc
1536 5119 d 6 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.asc
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.DSN
1531 5132 d 9 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1530 5132 d 16 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1529 5132 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1528 5132 d 18 h kaklik /Modules/ Diff
/Modules/Memory/SDcard01B
/Modules/Memory/SDcard01B/SCH
/Modules/Memory/SDcard01B/SCH/SDCARD.DSN
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1527 5132 d 20 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1526 5133 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1525 5133 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1524 5133 d 15 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
1523 5133 d 15 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1522 5134 d 13 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
/Modules/Clock/CLKGEN01A/PrjInfo.txt