Rev Age Author Path Log message Diff
1555 5207 d 13 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5218 d 1 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5218 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5220 d 22 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5220 d 23 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5222 d 0 h kaklik / Diff
1543 5222 d 1 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5222 d 2 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5222 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5222 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5222 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5239 d 15 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5239 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5239 d 23 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5240 d 0 h kaklik /Modules/ Diff
1527 5240 d 2 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5240 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5240 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5240 d 21 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5240 d 21 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff