Rev Age Author Path Log message Diff
1541 5143 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5143 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5143 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5146 d 19 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5147 d 1 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5147 d 15 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5156 d 22 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5156 d 22 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5156 d 23 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5160 d 18 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5161 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5161 d 2 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5161 d 3 h kaklik /Modules/ Diff
1527 5161 d 5 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5161 d 19 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5161 d 20 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5162 d 0 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5162 d 0 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
1522 5162 d 22 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
1521 5164 d 20 h kaklik /Modules/ schema modulu pro generovani hodin. Diff