Rev Age Author Path Log message Diff
3392 3862 d 9 h kaklik /Modules/Clock/CLKDIV01A/PCB/ Diff
3391 3862 d 10 h kaklik /Modules/Clock/CLKDIV01A/PCB/ prvni slusne zapojeni diferencialnich paru. Diff
3390 3862 d 10 h jacho /Modules/CommSerial/USBI2C01A/ Diff
3389 3862 d 11 h kaklik /Modules/Clock/CLKDIV01A/PCB/ otoceni a srovnani konektoru Diff
3388 3862 d 11 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3387 3862 d 12 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3386 3862 d 15 h kaklik /Modules/Clock/CLKDIV01A/ aktualizace podle noveho navrhu. Diff
3385 3863 d 7 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zkouska zaroutovatelnosti. Diff
3384 3863 d 7 h kaklik /Modules/Clock/CLKDIV01A/ prvni schema a plosny spoj modulu delicky. Diff
3383 3863 d 10 h kaklik /Modules/ zalozeni noveho modulu pro delicku hodin. Diff
3381 3868 d 3 h kaklik /Modules/Sensors/ pridani kostry pro cteni referencniho tlakomeru. Diff
3376 3875 d 1 h kaklik /Modules/Sensors/ALTIMET01A/SW/Python/ testovaci program pro vycitani mereni ze sensoru. Diff
3375 3875 d 2 h kaklik /Modules/Sensors/ALTIMET01A/SW/ sensor testing. Diff
3374 3877 d 8 h kaklik /Modules/Sensors/ Diff
3373 3882 d 12 h kaklik / zlepseni dokumentace. Diff
3372 3882 d 13 h jacho /Modules/CommSerial/USBI2C01A/pdf/CP2112/ Diff
3371 3882 d 13 h kaklik / vylepseni dokumentace Diff
3370 3883 d 9 h kaklik / zalozeni dokumentacni slozky pro novy modul FPGA. Diff
3369 3885 d 1 h kaklik / vylepseni dokumentace. Diff
3368 3885 d 16 h kaklik / pridani zapomenutych souboru. Diff