Rev Age Author Path Log message Diff
3392 3887 d 3 h kaklik /Modules/Clock/CLKDIV01A/PCB/ Diff
3391 3887 d 4 h kaklik /Modules/Clock/CLKDIV01A/PCB/ prvni slusne zapojeni diferencialnich paru. Diff
3390 3887 d 4 h jacho /Modules/CommSerial/USBI2C01A/ Diff
3389 3887 d 5 h kaklik /Modules/Clock/CLKDIV01A/PCB/ otoceni a srovnani konektoru Diff
3388 3887 d 5 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3387 3887 d 6 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3386 3887 d 9 h kaklik /Modules/Clock/CLKDIV01A/ aktualizace podle noveho navrhu. Diff
3385 3888 d 1 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zkouska zaroutovatelnosti. Diff
3384 3888 d 1 h kaklik /Modules/Clock/CLKDIV01A/ prvni schema a plosny spoj modulu delicky. Diff
3383 3888 d 4 h kaklik /Modules/ zalozeni noveho modulu pro delicku hodin. Diff
3381 3892 d 21 h kaklik /Modules/Sensors/ pridani kostry pro cteni referencniho tlakomeru. Diff
3376 3899 d 19 h kaklik /Modules/Sensors/ALTIMET01A/SW/Python/ testovaci program pro vycitani mereni ze sensoru. Diff
3375 3899 d 20 h kaklik /Modules/Sensors/ALTIMET01A/SW/ sensor testing. Diff
3374 3902 d 2 h kaklik /Modules/Sensors/ Diff
3373 3907 d 6 h kaklik / zlepseni dokumentace. Diff
3372 3907 d 7 h jacho /Modules/CommSerial/USBI2C01A/pdf/CP2112/ Diff
3371 3907 d 7 h kaklik / vylepseni dokumentace Diff
3370 3908 d 3 h kaklik / zalozeni dokumentacni slozky pro novy modul FPGA. Diff
3369 3909 d 19 h kaklik / vylepseni dokumentace. Diff
3368 3910 d 10 h kaklik / pridani zapomenutych souboru. Diff