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4479 3183 d 3 h kaklik /Designs/HAM Constructions/SDRX01B/DOC/SRC/img/ Pridani blokoveho schema SDR-widget. Diff
/Designs/HAM Constructions/SDRX01B/DOC/SRC/img/SDR-widget.dia
/Designs/HAM Constructions/SDRX01B/DOC/SRC/img/SDR-widget.png
3725 3691 d 11 h kaklik / vygenerovani technologickych vystupu pro pragoboard. Diff
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/bot.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/mill.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/plt.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/pth.exc
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/smb.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/smt.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/PragoBoard/top.gbr
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.dia
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.png
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-B_Cu.gbl
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-B_Mask.gbs
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-Edge_Cuts.gbr
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-F_Cu.gtl
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-F_Mask.gts
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A-F_SilkS.gto
/Modules/AVR/AT32TQ14401A/CAM_PROFI/AT32TQ14401A.drl
/Modules/AVR/AT32TQ14401A/SCH_PCB/AT32TQ14401A.kicad_pcb
/Scripts/gen_PragoBoard.sh
3708 3720 d 6 h kaklik /Designs/HAM Constructions/SDRX02B/ pridani diplomky. Diff
/Designs/HAM Constructions/SDRX02B/DOC/2014-05-12KakonaDiplThesisCTU-Prague.pdf
/Designs/HAM Constructions/SDRX02B/SW/GRC
/Designs/HAM Constructions/SDRX02B/SW/GRC/AM_receiver.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/FM_receiver.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/FM_stanice.txt
/Designs/HAM Constructions/SDRX02B/SW/GRC/Grabber.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/Grabber_QT.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/MLAB_ADC_Grabber.py
/Designs/HAM Constructions/SDRX02B/SW/GRC/Player.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/Player_balance.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/Player_fm.grc
/Designs/HAM Constructions/SDRX02B/SW/GRC/Records_player.py
/Designs/HAM Constructions/SDRX02B/SW/GRC/top_block.py
3643 3842 d 15 h kaklik / zarozena nova dokumentacni slozka pro modul urceny symetrizaci signalu. Diff
/Modules/CommRF/SMA2SATA01A
/Modules/CommRF/SMA2SATA01A/CAM_AMA
/Modules/CommRF/SMA2SATA01A/CAM_DOC
/Modules/CommRF/SMA2SATA01A/CAM_PROFI
/Modules/CommRF/SMA2SATA01A/CAM_PROFI/Preview.gvp
/Modules/CommRF/SMA2SATA01A/DOC
/Modules/CommRF/SMA2SATA01A/DOC/HTML
/Modules/CommRF/SMA2SATA01A/DOC/SRC
/Modules/CommRF/SMA2SATA01A/PrjInfo.txt
/Modules/CommRF/SMA2SATA01A/SCH_PCB
/Modules/CommRF/SMA2SATA01A/SCH_PCB/SMA2SATA.pro
/Modules/CommRF/SMA2SATA01A/SW
/Modules/CommRF/SMA2SATA01A/pdf
/Designs/HAM Constructions/SDRX02B/HDL/README.txt
/Modules/Measuring/GPS01A/TODO.txt
3641 3846 d 12 h kaklik /Designs/HAM Constructions/SDRX02B/HDL/ Pridani HDL zdrojovych kodu. Diff
/Designs/HAM Constructions/SDRX02B/HDL
/Designs/HAM Constructions/SDRX02B/HDL/README.txt
/Designs/HAM Constructions/SDRX02B/HDL/modules
/Designs/HAM Constructions/SDRX02B/HDL/modules/comm
/Designs/HAM Constructions/SDRX02B/HDL/modules/comm/spi_master_transmit.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/clk_125MHz_to_6MHz.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512_dualclk_fwft.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512_walmostfull.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/fifo_related
/Designs/HAM Constructions/SDRX02B/HDL/modules/fifo_related/fifo_to_enable.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/information
/Designs/HAM Constructions/SDRX02B/HDL/modules/information/information_block.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/clock_divider.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/up_counter.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/up_counter_stdlv.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/xilly
/Designs/HAM Constructions/SDRX02B/HDL/modules/xilly/xilly_userlogiccmp_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src
/Designs/HAM Constructions/SDRX02B/HDL/project_src/bitslip_compensation.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/glue_data.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/information_data.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/iserdes_clock_generator.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/kakona_package.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/lo_divider_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/multiplexer_from_fifos.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/myserdes_ddr.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/myserdes_ddr_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/processing_block.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/saw_generator_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/spi_transmitter_wrapper2.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/swap_endianness.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/userlogiccmp_template.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xilly
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xilly/xilly_toplevel.userlogiccmp_kakona.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xillybus_ml605_kakona.ucf
3635 3852 d 14 h miho /Designs/HAM Constructions/ContestInterface/DOC/ Rozdělení a aktualizace dokumentace závodního interfejsu. Diff
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_kabely_V1_2_1.pdf
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_popis_V1_2_2_.pdf
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_V1_2_1.pdf
3591 3887 d 1 h kaklik /Designs/HAM Constructions/SDRX02B/ Aktualizace popisku. Diff
/Designs/HAM Constructions/SDRX02B/PrjInfo.txt
/Designs/HAM Constructions/SDRX02B/PrjInfo.txt~
3589 3887 d 10 h miho /Designs/HAM Constructions/ContestInterface/SW/FT_List/ Doplněn program FT_List o čekání na klávesu po skončení běhu. Diff
/Designs/HAM Constructions/ContestInterface/SW/FT_List/BIN/FT_List.exe
/Designs/HAM Constructions/ContestInterface/SW/FT_List/FT_List.cpp
3588 3887 d 13 h kaklik / aktualizace schema zarizeni. Diff
/Modules/ADconverters/ADCdual01A/TODO.txt
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.dia
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.png
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.bak
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.pdf
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pdf
3587 3889 d 6 h kaklik /Designs/HAM Constructions/SDRX01B/DOC/ aktualizace dokumentace. Diff
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.cs.pdf
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.en.pdf
/Designs/HAM Constructions/SDRX01B/DOC/SRC/SDRX01B.cs.tex
3573 3894 d 11 h miho /Designs/HAM Constructions/ContestInterface/DOC/ Aktualizace dokumentace (opravy drobných nepřesností) Diff
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_V1_2_1.pdf
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_V1_2_0.pdf
3520 3911 d 5 h kaklik / zapis pozadavku a zlepseni dokumentace. Diff
/Designs/HAM Constructions/SDRX01B/pdf/ne5532.pdf
/Modules/Audio/ADCaudio01A/TODO.txt
/Modules/PowerSupply/CHPUMP01A/pdf
/Modules/PowerSupply/CHPUMP01A/pdf/TC682E.pdf
3495 3922 d 13 h miho /Designs/HAM Constructions/ContestInterface/DOC/ Dokumentace k závodnímu modulu Diff
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_V1_2_0.pdf
3464 3936 d 13 h kaklik /Designs/ nakresleno nove blokove schema prijimace. Diff
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.dia
/Designs/HAM Constructions/SDRX02B/SCH/Coherent_UHF_SDR_receiver.png
/Designs/Measuring_instruments/AWS01B/SW/PIC16F887/i2c_wind_sensor/main.c
3455 3944 d 11 h miho /Designs/HAM Constructions/ContestInterface/SW/ Připraven program pro výpis nalezených FTDI obvodů s čísly přiřazených portů (Windows konzolová aplikace) Diff
/Designs/HAM Constructions/ContestInterface/SW
/Designs/HAM Constructions/ContestInterface/SW/FT_List
/Designs/HAM Constructions/ContestInterface/SW/FT_List/BIN
/Designs/HAM Constructions/ContestInterface/SW/FT_List/BIN/FT_List.exe
/Designs/HAM Constructions/ContestInterface/SW/FT_List/FT_List.cpp
/Designs/HAM Constructions/ContestInterface/SW/FT_List/lib_win32
/Designs/HAM Constructions/ContestInterface/SW/FT_List/lib_win32/ftd2xx.h
/Designs/HAM Constructions/ContestInterface/SW/FT_List/lib_win32/ftd2xx.lib
3445 3958 d 11 h kaklik / zlepseni dokumentace modulu. Diff
/Modules/ADconverters/ACOMP01A/DOC/SRC/img
/Modules/ADconverters/ACOMP01A/DOC/SRC/img/ACOMP01A_QRcode.png
/Modules/ADconverters/ADCdual01A/DOC/SRC/img
/Modules/ADconverters/ADCdual01A/DOC/SRC/img/ADCdual01A_QRcode.png
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img/S6AN01A_QRcode.png
/Modules/Clock/CLK1PLL01A/DOC/SRC
/Modules/Clock/CLK1PLL01A/DOC/SRC/img
/Modules/Clock/CLK1PLL01A/DOC/SRC/img/CLK1PLL01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/CLKDIV01A.cs.pdf
/Modules/Clock/CLKDIV01A/DOC/SRC/img
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_Top_Big.jpg
/Modules/CommRF/FORX01A/DOC/SRC/img
/Modules/CommRF/FORX01A/DOC/SRC/img/FORX01A_QRcode.png
/Modules/CommRF/FOTX01A/DOC/SRC/img
/Modules/CommRF/FOTX01A/DOC/SRC/img/FOTX01A_QRcode.png
/Modules/CommSerial/USBI2C01A/DOC/SRC/img
/Modules/CommSerial/USBI2C01A/DOC/SRC/img/USBI2C01A_QRcode.png
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Top_Big.jpg
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img/BATPOWER04A_QRcode.png
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img/BATPOWER04B_QRcode.png
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img/CHPUMP01A_QRcode.png
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img/TPS63060V01A_QRcode.png
/Modules/Sensors/RPS01A/DOC/SRC/img
/Modules/Sensors/RPS01A/DOC/SRC/img/RPS01A_QRcode.png
/Modules/Universal/UNISERIAL01A/DOC/SRC/img
/Modules/Universal/UNISERIAL01A/DOC/SRC/img/UNISERIAL01A_QRcode.png
/Modules/Clock/CLKDIV01A/SW
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Top_Big.jpg
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.cs.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/Clock/CLKDIV01A/PrjInfo.txt
/Modules/Measuring/GPS01A/TODO.txt
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png
3426 3967 d 4 h kaklik /Designs/HAM Constructions/SDRX01B/pdf/ pridani dokumentace. Diff
/Designs/HAM Constructions/SDRX01B/pdf/LT6231.pdf
3421 3969 d 8 h kaklik / vylepseni dokumentace. Diff
/Modules/CommSerial/TBPCIE01A/pdf/konektory/MB-0248-1E_DP3.pdf
/Modules/CommSerial/TBPCIE01A/pdf/thunderbolt-technology-brief.pdf
/Modules/PowerSupply/BATPOWER04B/pdf/15mq040n.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC
/Modules/Universal/UNISERIAL01A/CAM_DOC/O1.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/O2.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/SCH.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/V2.pdf
/Modules/Universal/UNISERIAL01A/DOC
/Modules/Universal/UNISERIAL01A/DOC/SRC
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.aux
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.log
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.out
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.pdf
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.synctex.gz
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.tex
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.toc
/Modules/Universal/UNISERIAL01A/PrjInfo.txt
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB1.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB2.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB4.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_SCH.pdf
/Designs/HAM Constructions/SDRX01B/DOC/SRC/SDRX01B.cs.tex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.c
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.hex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.pjt
/Modules/ARM/STM32F10xRxT01A/DOC/SRC/STM32F10xRxT.cs.tex
/Modules/Clock/CLKHUB02A/DOC/SRC/CLKHUB02A.cs.tex
3377 3999 d 7 h miho /Designs/HAM Constructions/ContestInterface/ Přednáška k závodnímu modulu. Diff
/Designs/HAM Constructions/ContestInterface
/Designs/HAM Constructions/ContestInterface/ContestInterface_Small.jpg
/Designs/HAM Constructions/ContestInterface/DOC
/Designs/HAM Constructions/ContestInterface/DOC/DOC_Zavodni_modul_prednaska_V1_1.pdf
/Designs/HAM Constructions/ContestInterface/PrjInfo.txt
3370 4010 d 8 h kaklik / zalozeni dokumentacni slozky pro novy modul FPGA. Diff
/Designs/HAM Constructions/RMTS01A/pdf
/Designs/HAM Constructions/RMTS01A/pdf/afe7071.pdf
/Modules/CPLD_FPGA/S6AN01A
/Modules/CPLD_FPGA/S6AN01A/CAM_AMA
/Modules/CPLD_FPGA/S6AN01A/CAM_DOC
/Modules/CPLD_FPGA/S6AN01A/CAM_PROFI
/Modules/CPLD_FPGA/S6AN01A/CAM_PROFI/Preview.gvp
/Modules/CPLD_FPGA/S6AN01A/DOC
/Modules/CPLD_FPGA/S6AN01A/DOC/HTML
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC
/Modules/CPLD_FPGA/S6AN01A/PCB
/Modules/CPLD_FPGA/S6AN01A/PrjInfo.txt
/Modules/CPLD_FPGA/S6AN01A/SCH
/Modules/CPLD_FPGA/S6AN01A/SW
/Modules/CPLD_FPGA/S6AN01A/pdf
/Modules/CPLD_FPGA/S6AN01A/pdf/ds160.pdf
/Modules/CPLD_FPGA/S6AN01A/pdf/ds162.pdf