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Rev Age Author Path Log message Diff
1896 4995 d 13 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. Diff
1894 4996 d 8 h kaklik /Modules/CommSerial/ETH02A/ Diff
1892 5005 d 8 h kaklik /Modules/CommSerial/ETH02A/ zacatek kresleni PCB Diff
1891 5005 d 9 h kaklik /Modules/ schema modulu s ehternet konektorem. Diff
1890 5007 d 13 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1888 5007 d 15 h kaklik / vygenerevani osazovaku Diff
1887 5012 d 13 h kaklik /Modules/CommSerial/ založen nový modul s ethernet konektorem. Diff
1886 5013 d 9 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Prvni verze, co neco meri. Diff
1883 5016 d 10 h jacho /Modules/ pridani odkazu na UST Diff
1882 5016 d 10 h jacho /Modules/ADconverters/ADCmonoSPI01B/ pridani odkazu na ust Diff
1879 5018 d 14 h jacho / Diff
1878 5018 d 14 h jacho /Modules/AVR/ Diff
1877 5018 d 14 h jacho /Modules/AVR/ATmega801B/ Diff
1876 5018 d 14 h jacho /Modules/AVR/ATmegaTQ4401A/ Diff
1875 5018 d 15 h jacho /Modules/AVR/ATmega801B/ Diff
1874 5018 d 15 h kaklik /Modules/CommSerial/ETH01A/SCH/ vylepseni odruseni Diff
1871 5019 d 7 h kaklik /Modules/CommSerial/ETH01A/ vygenerovani zakladni obrazkove dokumentace. Diff
1870 5019 d 9 h kaklik /Modules/PIC/PIC16F87xTQ4401B/ pridani spravne cesty Diff
1866 5019 d 11 h kaklik / vytvořena buňka s okkazem do obchodu. Diff
1863 5019 d 19 h kaklik /Modules/Clock/CLKGEN01B/DOC/ napsan clanek o pripojeni CLKGEN k pocitaci. Diff