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Rev Age Author Path Log message Diff
3392 3988 d 17 h kaklik /Modules/Clock/CLKDIV01A/PCB/ Diff
3391 3988 d 18 h kaklik /Modules/Clock/CLKDIV01A/PCB/ prvni slusne zapojeni diferencialnich paru. Diff
3390 3988 d 18 h jacho /Modules/CommSerial/USBI2C01A/ Diff
3389 3988 d 19 h kaklik /Modules/Clock/CLKDIV01A/PCB/ otoceni a srovnani konektoru Diff
3388 3988 d 19 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3387 3988 d 20 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3386 3988 d 23 h kaklik /Modules/Clock/CLKDIV01A/ aktualizace podle noveho navrhu. Diff
3385 3989 d 15 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zkouska zaroutovatelnosti. Diff
3384 3989 d 15 h kaklik /Modules/Clock/CLKDIV01A/ prvni schema a plosny spoj modulu delicky. Diff
3383 3989 d 18 h kaklik /Modules/ zalozeni noveho modulu pro delicku hodin. Diff
3381 3994 d 10 h kaklik /Modules/Sensors/ pridani kostry pro cteni referencniho tlakomeru. Diff
3376 4001 d 9 h kaklik /Modules/Sensors/ALTIMET01A/SW/Python/ testovaci program pro vycitani mereni ze sensoru. Diff
3375 4001 d 10 h kaklik /Modules/Sensors/ALTIMET01A/SW/ sensor testing. Diff
3374 4003 d 16 h kaklik /Modules/Sensors/ Diff
3373 4008 d 19 h kaklik / zlepseni dokumentace. Diff
3372 4008 d 21 h jacho /Modules/CommSerial/USBI2C01A/pdf/CP2112/ Diff
3371 4008 d 21 h kaklik / vylepseni dokumentace Diff
3370 4009 d 17 h kaklik / zalozeni dokumentacni slozky pro novy modul FPGA. Diff
3369 4011 d 9 h kaklik / vylepseni dokumentace. Diff
3368 4012 d 0 h kaklik / pridani zapomenutych souboru. Diff