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Rev Age Author Path Log message Diff
3392 3880 d 22 h kaklik /Modules/Clock/CLKDIV01A/PCB/ Diff
3391 3880 d 22 h kaklik /Modules/Clock/CLKDIV01A/PCB/ prvni slusne zapojeni diferencialnich paru. Diff
3390 3880 d 22 h jacho /Modules/CommSerial/USBI2C01A/ Diff
3389 3880 d 23 h kaklik /Modules/Clock/CLKDIV01A/PCB/ otoceni a srovnani konektoru Diff
3388 3880 d 23 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3387 3881 d 0 h kaklik /Modules/Clock/CLKDIV01A/ Diff
3386 3881 d 4 h kaklik /Modules/Clock/CLKDIV01A/ aktualizace podle noveho navrhu. Diff
3385 3881 d 20 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zkouska zaroutovatelnosti. Diff
3384 3881 d 20 h kaklik /Modules/Clock/CLKDIV01A/ prvni schema a plosny spoj modulu delicky. Diff
3383 3881 d 22 h kaklik /Modules/ zalozeni noveho modulu pro delicku hodin. Diff
3381 3886 d 15 h kaklik /Modules/Sensors/ pridani kostry pro cteni referencniho tlakomeru. Diff
3376 3893 d 13 h kaklik /Modules/Sensors/ALTIMET01A/SW/Python/ testovaci program pro vycitani mereni ze sensoru. Diff
3375 3893 d 15 h kaklik /Modules/Sensors/ALTIMET01A/SW/ sensor testing. Diff
3374 3895 d 20 h kaklik /Modules/Sensors/ Diff
3373 3901 d 0 h kaklik / zlepseni dokumentace. Diff
3372 3901 d 1 h jacho /Modules/CommSerial/USBI2C01A/pdf/CP2112/ Diff
3371 3901 d 1 h kaklik / vylepseni dokumentace Diff
3370 3901 d 22 h kaklik / zalozeni dokumentacni slozky pro novy modul FPGA. Diff
3369 3903 d 14 h kaklik / vylepseni dokumentace. Diff
3368 3904 d 4 h kaklik / pridani zapomenutych souboru. Diff