Rev Age Author Path Log message Diff
1790 4948 d 20 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 6021 d 0 h kakl /Modules/CPLD/ Diff
1049 6021 d 22 h kakl /Modules/ Diff
1001 6043 d 18 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6074 d 20 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6074 d 20 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6078 d 22 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6080 d 0 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6080 d 2 h spirek /Modules/CPLD/ Diff