Rev Age Author Path Log message Diff
1790 5000 d 1 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 6072 d 5 h kakl /Modules/CPLD/ Diff
1049 6073 d 2 h kakl /Modules/ Diff
1001 6094 d 23 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6126 d 0 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6126 d 0 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6130 d 3 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6131 d 5 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6131 d 6 h spirek /Modules/CPLD/ Diff