Rev Age Author Path Log message Diff
1790 4971 d 18 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 6043 d 22 h kakl /Modules/CPLD/ Diff
1049 6044 d 20 h kakl /Modules/ Diff
1001 6066 d 16 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6097 d 18 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6097 d 18 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6101 d 21 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6102 d 22 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6103 d 0 h spirek /Modules/CPLD/ Diff