Rev Age Author Path Log message Diff Changes
1791 5050 d 23 h miho /Modules/CPLD_FPGA/S3AN01A/ Created FPGA module (school board) for XILINX Spartan 3 XC3S50AN gate array S3AN01A Diff
/Modules/CPLD_FPGA/S3AN01A
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/T1_AMA.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/V2_AMA.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_AMA/V2_REAL.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/Drill.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_DOC/V2.pdf
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/M1.PHO
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/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/P2.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/T1.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/S3AN01A/CAM_PROFI/V2.PHO
/Modules/CPLD_FPGA/S3AN01A/PCB
/Modules/CPLD_FPGA/S3AN01A/PCB/S3AN01A.pcb
/Modules/CPLD_FPGA/S3AN01A/PrjInfo.txt
/Modules/CPLD_FPGA/S3AN01A/SCH
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.ASC
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.DSN
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_BOM.xls
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_SCH.pdf
1790 5050 d 23 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
/Modules/CPLD_FPGA
/Modules/CPLD
/Modules/CPLD_FPGA/ISPLSI1016A/SCH/ISPLSI1016A.DBK
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/Modules/CPLD_FPGA/ISPLSI1016A/SCH/LATTICE.OBK
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/Modules/CPLD_FPGA/DirInfo.txt
1062 6123 d 3 h kakl /Modules/CPLD/ Diff
/Modules/CPLD/DirInfo.txt
1049 6124 d 1 h kakl /Modules/ Diff
/Modules/CPLD/cpld_Small.jpg
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1001 6145 d 21 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
/Modules/CPLD/DirInfo.txt
/Modules/CommSerial/DirInfo.txt
/Modules/PowerSW/DirInfo.txt
/Modules/AVR/info.cs.txt
/Modules/AVR/info.en.txt
/Modules/Audio/info.cs.txt
/Modules/Audio/info.en.txt
/Modules/CPLD/info.cs.txt
/Modules/CommIR/info.cs.txt
/Modules/CommIR/info.en.txt
/Modules/CommSerial/info.cs.txt
/Modules/H_Bridge/info.cs.txt
/Modules/H_Bridge/info.en.txt
/Modules/HumanInterfaces/info.cs.txt
/Modules/HumanInterfaces/info.en.txt
/Modules/CommIR/DirInfo.txt
/Modules/CommRF/DirInfo.txt
/Modules/H_Bridge/DirInfo.txt
/Modules/HumanInterfaces/DirInfo.txt
/Modules/Measuring/DirInfo.txt
/Modules/OpAmps/DirInfo.txt
/Modules/PIC/DirInfo.txt
/Modules/PowerSupply/DirInfo.txt
/Modules/Sensors/DirInfo.txt
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927 6176 d 22 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
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926 6176 d 23 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
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923 6181 d 1 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
/Modules/CPLD/info.cs.txt
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921 6182 d 3 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
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920 6182 d 4 h spirek /Modules/CPLD/ Diff
/Modules/CPLD
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/Modules/CPLD/ISPLSI1016A/SCH/ISPLSI1016A.DBK
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/Modules/CPLD/ISPLSI1016A/SCH/LATTICE.OLB