Rev Age Author Path Log message Diff Changes
2942 4203 d 5 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ Uvolněna Linux verze programu mlab_xvcd (ověřeno na Ubuntu 12.04LTS) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/10-MLAB-XVC-FTDI.rules
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/linuxBuild.sh
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd_i386
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
2941 4203 d 5 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ Program mlab_xvcd po restrukturalizaci zdrojáků a opravě cest a komentářů (formální změny) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
2940 4206 d 23 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ Rozšíření programu mlab_xvcd o podporu pro Linux (Linux verze ještě nutno doladit, funguje jen někde). Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd_i386
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/lib_linux_i386
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/lib_win32
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/lib_win32/ftd2xx.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/lib_win32/ftd2xx.lib
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.lib
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/!____!.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.h
2939 4207 d 13 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Dokončena dokumentace modulu XVC_FT220X02A Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs.html
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image001.jpg
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image002.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image003.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image004.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image005.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image006.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image007.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image008.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image009.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/!____!.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A.cs.doc
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A_Bot.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A_Top.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/XVC_FT220X02A.cs.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_BOM.xls
2937 4208 d 23 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Přidány obrázky do sekce XVC Diff
/Modules/CPLD_FPGA/XILINX_XVC/SchemaCyklu_Small.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/XVC_FT220X02A_Bot_Small.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/XVC_FT220X02A_Top_Small.JPG
2936 4208 d 23 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/ Dokončena dokumentace modulu XVC_FT220X01A (včetně HTML verze) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs.html
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image001.jpg
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image002.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image003.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image004.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image005.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image006.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image007.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image008.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image009.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/FT_Prog.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/FT_Prog_Description.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IMPACT_Plugin.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IMPACT_Prog.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IdeovéSchéma.odg
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A.cs.doc
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/XVC_FT220X01A.cs.pdf
2935 4210 d 11 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ Oprava ošetření chybových stavů programu mlab_xvcd.exe (test odpojení kabelu během čekání na accept) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.h
2933 4212 d 23 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ Zlepšení chybových výpisů (vícenásobné spuštění programu a zařízení používané jiným programem) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
2932 4213 d 0 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Aktualizace SCH a PCB souborů (opravy součástek) pro XVC_FT220X02A (jen formální změny a změny hodnot) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_BOM.xls
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_SCH.PDF
2931 4213 d 0 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/ Aktualizace SCH a PCB souborů (opravy součástek) pro XVC_FT220X01A (jen formální změny a změny hodnot) Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A_BOM.xls
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A_SCH.pdf
2930 4213 d 8 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/ Doplněna konfigurace pro obvod FT230XS pro modul XVC_FT220X Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/XVC_FT230X.xml
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/XVC_FT230X_Original.xml
2929 4213 d 14 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/ Přidána dávka pro programování EEPROM obvodu FTDI modulu XVC_FT220X Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/XVC_FT220X.xml
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/prog_EEPROM.bat
2879 4236 d 13 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Oprava M1 (maskování FIDU značek). Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/TODO.txt
2878 4240 d 12 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Posunul jsem některé SMD součástky aby se nedotýkaly otvory v masce. Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/T2_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_REAL.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/P1.pho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
2874 4244 d 11 h kaklik / zapis pripominek ke konstrukci modulu Diff
/Designs/HAM Constructions/SDRX01A/DOC/SRC/mereniSDRX.txt
/Designs/Measuring_instruments/ABL01A/SW/models
/Designs/Measuring_instruments/ABL01A/SW/models/list.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/XVC_FT220X02A.gvp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/TODO.txt
/Modules/CommSerial/I2CHUB02A/TODO.txt
/Modules/CommSerial/I2CHUB02A/SCH_PCB/untitled.brd
/Modules/CommSerial/I2CHUB02A/SCH_PCB/untitled.sch
2856 4247 d 8 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Nový modul XVC_FT220X02A (odvozený z XVC_FT220X01A), zatím bez dokumentace. Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/T2_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_REAL.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/drill.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/P1.pho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/T2.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_SCH.PDF
2697 4329 d 6 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/ Program mlab_xvcd.exe včetně zdrojáků. Obslužný program Xilinx Virtual Cable pro Windows a FTDI. Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/!____!.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.lib
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.h
2682 4339 d 11 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/ Doplněny technologické a dokumentační výstupy XVC_FT220X01A, chybí návod, BOM a dávka pro naprogramování EEPROM. Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/DRILL.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A_Bot_Big.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A_Top_Big.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A_SCH.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Bot_Small.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Top_Small.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN
2681 4343 d 1 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Oprava popisného souboru (formální změna) Diff
/Modules/CPLD_FPGA/XILINX_XVC/DirInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/PrjInfo.txt
2680 4343 d 1 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Nový modul XVC s FT220X (zatím jen design soubory). Čeká na otestování. Diff
/Modules/CPLD_FPGA/XILINX_XVC
/Modules/CPLD_FPGA/XILINX_XVC/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/T2_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/V1_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/P1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/T2.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN