Rev Age Author Path Log message Diff Changes
2681 4346 d 1 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Oprava popisného souboru (formální změna) Diff
/Modules/CPLD_FPGA/XILINX_XVC/DirInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/PrjInfo.txt
2680 4346 d 1 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Nový modul XVC s FT220X (zatím jen design soubory). Čeká na otestování. Diff
/Modules/CPLD_FPGA/XILINX_XVC
/Modules/CPLD_FPGA/XILINX_XVC/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/T2_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/V1_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/P1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/T2.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN