3146 |
4013 d 14 h |
kaklik |
/Modules/ |
odstraneny nadbytecne rezistory a nahrazeny rezervnimi pull up / pull down rezistory |
Diff |
/Modules/CommSerial/ETH01A/SCH/ETH01.asc |
/Modules/CPLD_FPGA/XILINX_XVC/DOC |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN /Modules/CommSerial/ETH01A/PCB/ETH01.pcb /Modules/CommSerial/ETH01A/SCH/ETH01.DSN /Modules/CommSerial/ETH01A/SCH/ETH01.opj |
|
3108 |
4023 d 2 h |
kaklik |
/Modules/ |
pridani QR kodu i v dalsich adresarich. |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/DOC /Modules/CPLD_FPGA/XILINX_XVC/DOC/SRC /Modules/CPLD_FPGA/XILINX_XVC/DOC/SRC/img /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png /Modules/Mechanical/Boxes/DOC /Modules/Mechanical/Boxes/DOC/SRC /Modules/Mechanical/Boxes/DOC/SRC/img /Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png /Modules/Sensors/RGBFEE01A/DOC /Modules/Sensors/RGBFEE01A/DOC/SRC /Modules/Sensors/RGBFEE01A/DOC/SRC/img /Modules/Sensors/RGBFEE01A/RGBHD01A/DOC /Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC /Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img /Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png |
|
2947 |
4078 d 5 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/ |
|
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/EEPROM /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/EEPROM/Readme.txt /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/EEPROM/XVC_FT220X.xml /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/EEPROM/XVC_FT230X.xml /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/EEPROM/prog_EEPROM.bat /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_SOFTWARE_Small.png |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/EEPROM/prog_EEPROM.bat |
|
2939 |
4083 d 17 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ |
Dokončena dokumentace modulu XVC_FT220X02A |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs.html /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image001.jpg /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image002.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image003.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image004.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image005.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image006.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image007.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image008.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/HTML/XVC_FT220X02A.cs_soubory/image009.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/!____!.txt /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A.cs.doc /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A_Bot.JPG /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/XVC_FT220X02A_Top.JPG /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/XVC_FT220X02A.cs.pdf |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_BOM.xls |
|
2937 |
4085 d 3 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/ |
Přidány obrázky do sekce XVC |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/SchemaCyklu_Small.png /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/XVC_FT220X02A_Bot_Small.JPG /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/XVC_FT220X02A_Top_Small.JPG |
|
2932 |
4089 d 5 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ |
Aktualizace SCH a PCB souborů (opravy součástek) pro XVC_FT220X02A (jen formální změny a změny hodnot) |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_BOM.xls |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.ASC /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_SCH.PDF |
|
2879 |
4112 d 17 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ |
Oprava M1 (maskování FIDU značek). |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/TODO.txt |
|
2878 |
4116 d 16 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ |
Posunul jsem některé SMD součástky aby se nedotýkaly otvory v masce. |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/T2_AMA.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_AMA.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_REAL.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O1.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/V1.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/P1.pho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/V1.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb |
|
2874 |
4120 d 16 h |
kaklik |
/ |
zapis pripominek ke konstrukci modulu |
Diff |
/Designs/HAM Constructions/SDRX01A/DOC/SRC/mereniSDRX.txt /Designs/Measuring_instruments/ABL01A/SW/models /Designs/Measuring_instruments/ABL01A/SW/models/list.txt /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/XVC_FT220X02A.gvp /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/TODO.txt /Modules/CommSerial/I2CHUB02A/TODO.txt |
/Modules/CommSerial/I2CHUB02A/SCH_PCB/untitled.brd /Modules/CommSerial/I2CHUB02A/SCH_PCB/untitled.sch |
|
2856 |
4123 d 12 h |
miho |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ |
Nový modul XVC_FT220X02A (odvozený z XVC_FT220X01A), zatím bez dokumentace. |
Diff |
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/T2_AMA.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_AMA.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_REAL.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O1.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/V1.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/drill.pdf /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/BOARD.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.DRL /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.rep /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/P1.pho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/T2.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/V1.PHO /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PrjInfo.txt /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.ASC /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_SCH.PDF |
|