Rev Age Author Path Log message Diff
1790 4916 d 22 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 5989 d 2 h kakl /Modules/CPLD/ Diff
1049 5990 d 0 h kakl /Modules/ Diff
1001 6011 d 20 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6042 d 22 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6042 d 22 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6047 d 0 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6048 d 2 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6048 d 4 h spirek /Modules/CPLD/ Diff