Rev Age Author Path Log message Diff
1790 4927 d 0 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 5999 d 4 h kakl /Modules/CPLD/ Diff
1049 6000 d 1 h kakl /Modules/ Diff
1001 6021 d 22 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6052 d 23 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6052 d 23 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6057 d 2 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6058 d 4 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6058 d 5 h spirek /Modules/CPLD/ Diff