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Modules
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CPLD_FPGA
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Diff
3690
3822 d 17 h
kaklik
/
presunuti zdrojaku ke generatoru pulzu.
Diff
3512
3952 d 9 h
jacho
/Modules/
Diff
3509
3952 d 11 h
kaklik
/Modules/
pregenerovani dokumentace.
Diff
3445
3998 d 14 h
kaklik
/
zlepseni dokumentace modulu.
Diff
3425
4007 d 7 h
kaklik
/
pridani dalsi dokumentace.
Diff
3383
4030 d 12 h
kaklik
/Modules/
zalozeni noveho modulu pro delicku hodin.
Diff
3370
4050 d 11 h
kaklik
/
zalozeni dokumentacni slozky pro novy modul FPGA.
Diff
3327
4105 d 11 h
kaklik
/
pridani pres vikend vytvorenych souboru
Diff
3243
4170 d 7 h
kaklik
/Modules/CPLD_FPGA/
uprava jmenne konvence projektovych slozek.
Diff
3178
4178 d 8 h
kaklik
/
uprava skriptu pro vyrobu qr kodu a vyroba QR kodu pro nove moduly..
Diff
3174
4180 d 13 h
jacho
/Modules/
Diff
3146
4186 d 16 h
kaklik
/Modules/
odstraneny nadbytecne rezistory a nahrazeny rezervnimi pull up / pull down rezistory
Diff
3108
4196 d 4 h
kaklik
/Modules/
pridani QR kodu i v dalsich adresarich.
Diff
3106
4196 d 5 h
kaklik
/
vygenerovani QR kodu v modulech, ktere maji existujici soubor PrjInfo.txt
Diff
3094
4198 d 17 h
miho
/Modules/CPLD_FPGA/XILINX_CHIPSCOPE/BIN/14.6/
Přidán překlad FPGA S3AN01_ChipScope pro právě uvolněné ISE verze 14.6.
Diff
3093
4199 d 13 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/
Doplněna podpora mlab_xvcd pro Raspberry Pi Linux
Diff
3092
4199 d 22 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/lib_linux/
Zapomenuté knihovny pro XVCD (mají zakázanou příponu a tak unikly pozornosti)
Diff
3091
4201 d 12 h
miho
/Modules/CPLD_FPGA/XILINX_CHIPSCOPE/
Demo aplikace Xilinx ChipScope pro S3AN01 s použitím Xilinx Virtual Cable technologie
Diff
3090
4201 d 13 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/
Doplněna varianta mlab_xvcd_i386 o variantu for pro x86_64
Diff
2947
4251 d 7 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/
Diff