Rev Age Author Path Log message Diff
1790 4924 d 14 h miho /Modules/ Přejmenování podstromu CPLD na CPLD_FPGA Diff
1062 5996 d 18 h kakl /Modules/CPLD/ Diff
1049 5997 d 16 h kakl /Modules/ Diff
1001 6019 d 12 h miho /Modules/ Doplněny metainformace pro sekci Modules (nejvyšší úroveň) Diff
927 6050 d 13 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
926 6050 d 13 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
923 6054 d 16 h kaklik /Modules/CPLD/ upravy schematu chybi dodelat programovaci konektor. Diff
921 6055 d 18 h spirek /Modules/CPLD/ISPLSI1016A/SCH/ Diff
920 6055 d 19 h spirek /Modules/CPLD/ Diff