| 3430 |
3961 d 17 h |
miho |
/Modules/Clock/CLK1PLL01A/SCH/ |
Doplněn komentář. |
Diff |
| /Modules/Clock/CLK1PLL01A/SCH/!____!.txt |
|
| 3429 |
3961 d 19 h |
miho |
/Modules/Clock/CLK1PLL01A/ |
Dogenerované PDF soubory |
Diff |
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf |
|
| 3428 |
3962 d 0 h |
miho |
/Modules/Clock/CLK1PLL01A/ |
Opraven SCH a PCB CLK1PLL01A (oprava EN vývodů u stabilizátorů), nutno ještě přegenerovat PDF výstupy od plošného spoje (zde PDF995 generuje velmi nekvalitní výstupy, nutno použít něco funkčnějšího). |
Diff |
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf |
|
| 3427 |
3963 d 20 h |
kaklik |
/ |
vylepseni dokumentace studie prijimace |
Diff |
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.png
/Modules/Clock/CLK1PLL01A/pdf
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf |
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png |
|
| 3425 |
3965 d 11 h |
kaklik |
/ |
pridani dalsi dokumentace. |
Diff |
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf/ADuM3190.pdf
/Modules/CPLD_FPGA/S6AN01A/pdf/HDMI_connector.pdf
/Modules/Sensors/ALTIMET01A/SW/Python/dpi145_test.py |
/Modules/Clock/CLKDIV01A/TODO.txt
/Modules/Clock/CLKGEN01B/pdf/Si570.pdf
/Modules/CommSerial/I2CHUB02A/TODO.txt
/Modules/H_Bridge/DRV8835HB01A/TODO.txt
/Modules/Measuring/GPS01A/TODO.txt |
|
| 3424 |
3965 d 14 h |
miho |
/Modules/Clock/CLK1PLL01A/ |
Hodinový PLL generátor s obvodem TI CDCE913 (schema, PCB a technologické výstupy). |
Diff |
/Modules/Clock/CLK1PLL01A
/Modules/Clock/CLK1PLL01A/CAM_AMA
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI
/Modules/Clock/CLK1PLL01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/DOC
/Modules/Clock/CLK1PLL01A/PCB
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/PrjInfo.txt
/Modules/Clock/CLK1PLL01A/SCH
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf |
|
| 3421 |
3967 d 16 h |
kaklik |
/ |
vylepseni dokumentace. |
Diff |
/Modules/CommSerial/TBPCIE01A/pdf/konektory/MB-0248-1E_DP3.pdf
/Modules/CommSerial/TBPCIE01A/pdf/thunderbolt-technology-brief.pdf
/Modules/PowerSupply/BATPOWER04B/pdf/15mq040n.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC
/Modules/Universal/UNISERIAL01A/CAM_DOC/O1.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/O2.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/SCH.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/V2.pdf
/Modules/Universal/UNISERIAL01A/DOC
/Modules/Universal/UNISERIAL01A/DOC/SRC
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.aux
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.log
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.out
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.pdf
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.synctex.gz
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.tex
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.toc
/Modules/Universal/UNISERIAL01A/PrjInfo.txt |
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB1.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB2.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB4.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_SCH.pdf |
/Designs/HAM Constructions/SDRX01B/DOC/SRC/SDRX01B.cs.tex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.c
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.hex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.pjt
/Modules/ARM/STM32F10xRxT01A/DOC/SRC/STM32F10xRxT.cs.tex
/Modules/Clock/CLKHUB02A/DOC/SRC/CLKHUB02A.cs.tex |
|
| 3404 |
3987 d 8 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
vygenerovani nahledu. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V1.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V2.pdf |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3403 |
3987 d 8 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
oprava chyb z TODO. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3402 |
3987 d 9 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
zaznam nalezenych chyb.. |
Diff |
| /Modules/Clock/CLKDIV01A/TODO.txt |
|
| 3401 |
3987 d 9 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
pridani popisu nalezenych chyb. |
Diff |
| /Modules/Clock/CLKDIV01A/TODO.txt |
|
| 3398 |
3987 d 13 h |
kaklik |
/Modules/Clock/CLKDIV01A/SCH/ |
|
Diff |
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
/Modules/Clock/CLKDIV01A/SCH/clkdiv.pdf |
|
| 3397 |
3987 d 13 h |
kaklik |
/Modules/Clock/CLKDIV01A/SCH/ |
|
Diff |
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj |
|
| 3396 |
3987 d 14 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
vygenerovanitechnologickych vystupu |
Diff |
/Modules/Clock/CLKDIV01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3395 |
3987 d 14 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
|
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc |
|
| 3394 |
3987 d 15 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
ulozeni verze pred otocenim konektoru. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN |
|
| 3393 |
3987 d 16 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
zapojeni diff paru. |
Diff |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3392 |
3987 d 16 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
|
Diff |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3391 |
3987 d 16 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
prvni slusne zapojeni diferencialnich paru. |
Diff |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3389 |
3987 d 17 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
otoceni a srovnani konektoru |
Diff |
| /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|