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Rev Age Author Path Log message Diff Changes
1572 5199 d 1 h kaklik / poznamky problemu Diff
/Designs/HAM Constructions/SDRX01A/TODO.txt
/Modules/Clock/CLKGEN01A/opravit.txt
1555 5227 d 9 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKHUB02A/PCB/CLKHUB.pcb
1548 5237 d 21 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
/Modules/Clock/CLKHUB02A/DOC/CLKHUB02A.pdf
/Modules/Clock/CLKHUB02A/PrjInfo.txt
/Modules/Clock/CLKGEN01A/PrjInfo.txt
/Modules/Clock/CLKHUB01A/PrjInfo.txt
1547 5237 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
/Modules/Clock/CLKGEN01A/CLKGEN01A_Bottom_Small.jpg
/Modules/Clock/CLKGEN01A/DOC/SRC/CLKGEN01A_Bottom_Big.jpg
1546 5240 d 18 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
/Modules/Clock/CLKGEN01A/opravit.txt
1545 5240 d 19 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
/Modules/Clock/CLKGEN01A/CAM_AMA/T1.pdf
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1544 5241 d 20 h kaklik / Diff
/Modules/Clock/CLKGEN01A/CAM_AMA/V2.pdf
/Library/Templates/PADS/DEFAULT_v4.cam
1543 5241 d 21 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
/Modules/Clock/CLKGEN01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1542 5241 d 22 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
/Modules/Clock/CLKGEN01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKGEN01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKGEN01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1541 5242 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1540 5242 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1539 5242 d 11 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1531 5259 d 11 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1530 5259 d 18 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1529 5259 d 19 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1528 5259 d 20 h kaklik /Modules/ Diff
/Modules/Memory/SDcard01B
/Modules/Memory/SDcard01B/SCH
/Modules/Memory/SDcard01B/SCH/SDCARD.DSN
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1527 5259 d 22 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1526 5260 d 12 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1525 5260 d 13 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1524 5260 d 17 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN