←Prev12Next→ Show All
Rev Age Author Path Log message Diff
1572 5068 d 6 h kaklik / poznamky problemu Diff
1555 5096 d 15 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5107 d 2 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5107 d 3 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5110 d 0 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5110 d 1 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5111 d 2 h kaklik / Diff
1543 5111 d 2 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5111 d 4 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5111 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5111 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5111 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5128 d 16 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5128 d 23 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5129 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5129 d 2 h kaklik /Modules/ Diff
1527 5129 d 3 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5129 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5129 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5129 d 23 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff