Rev Age Author Path Log message Diff Changes
1539 5110 d 4 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1531 5127 d 3 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1530 5127 d 10 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1529 5127 d 12 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1528 5127 d 13 h kaklik /Modules/ Diff
/Modules/Memory/SDcard01B
/Modules/Memory/SDcard01B/SCH
/Modules/Memory/SDcard01B/SCH/SDCARD.DSN
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1526 5128 d 5 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1525 5128 d 5 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1517 5132 d 7 h kaklik /Modules/ presunuti a vytvoreni noveho modulu pro hodiny Diff
/Modules/Clock/CLKGEN01A
/Modules/Clock/CLKGEN01A/CAM_AMA
/Modules/Clock/CLKGEN01A/CAM_DOC
/Modules/Clock/CLKGEN01A/CAM_PROFI
/Modules/Clock/CLKGEN01A/DOC
/Modules/Clock/CLKGEN01A/DOC/HTML
/Modules/Clock/CLKGEN01A/DOC/SRC
/Modules/Clock/CLKGEN01A/PCB
/Modules/Clock/CLKGEN01A/SCH
/Modules/Clock/CLKGEN01A/SW
/Modules/Clock/CLKHUB01A
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.DSN
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.pdf
/Modules/ADconverters/CLKGEN01A
/Modules/Clock/CLKHUB01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKHUB01A/SCH/CLKGEN.pdf
/Modules/Clock/CLKHUB01A/PrjInfo.txt