Rev 0 – ?author? – ?age? (?date?)
?log?
Subversion Repositories
–
MLAB
MLAB
library
svnkaklik
MLAB_E
8magsvn
Català-Valencià – Catalan
中文 – Chinese (Simplified)
中文 – Chinese (Traditional)
Česky – Czech
Dansk – Danish
Nederlands – Dutch
English – English
Suomi – Finnish
Français – French
Deutsch – German
עברית – Hebrew
हिंदी – Hindi
Magyar – Hungarian
Bahasa Indonesia – Indonesian
Italiano – Italian
日本語 – Japanese
한국어 – Korean
Македонски – Macedonian
मराठी – Marathi
Norsk – Norwegian
Polski – Polish
Português – Portuguese
Português – Portuguese (Brazil)
Русский – Russian
Slovenčina – Slovak
Slovenščina – Slovenian
Español – Spanish
Svenska – Swedish
Türkçe – Turkish
Українська – Ukrainian
Oëzbekcha – Uzbek
(root)
/
Modules
/
Clock
/
CLKGEN01A
/
PCB
/
CLKGEN.pcb
@ 3824
Rev 0
Show changed files
Details
Blame
Compare with Previous
From rev:
To rev:
Max revs:
Search history for:
Rev
Age
Author
Path
Log message
Diff
1555
5221 d 14 h
kaklik
/Modules/Clock/
pokus s ladenim delky spoju
Diff
1545
5235 d 1 h
kaklik
/Modules/Clock/CLKGEN01A/
potisk
Diff
1543
5236 d 2 h
kaklik
/Modules/Clock/CLKGEN01A/
vymena CAM vystupu
Diff
1542
5236 d 3 h
kaklik
/Modules/Clock/CLKGEN01A/
generovani technologickych dat.
Diff
1541
5236 d 16 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1540
5236 d 16 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1539
5236 d 16 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1531
5253 d 16 h
kaklik
/Modules/Clock/CLKGEN01A/
pridani chybejicich terminacnich odporu..
Diff
1530
5253 d 23 h
kaklik
/Modules/Clock/CLKGEN01A/
Temer konecna verze PCB pro Si570. Respektive Si5XX
Diff
1529
5254 d 0 h
kaklik
/Modules/Clock/CLKGEN01A/
Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru.
Diff
1528
5254 d 1 h
kaklik
/Modules/
Diff
1526
5254 d 17 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1525
5254 d 18 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
zacatek prace na plosnem spoji.
Diff