←Prev12Next→ Show All
Rev Age Author Path Log message Diff
1572 5250 d 9 h kaklik / poznamky problemu Diff
1555 5278 d 18 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5289 d 5 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5289 d 6 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5292 d 3 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5292 d 4 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5293 d 5 h kaklik / Diff
1543 5293 d 5 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5293 d 7 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5293 d 19 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5293 d 20 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5293 d 20 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5310 d 19 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5311 d 2 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5311 d 4 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5311 d 5 h kaklik /Modules/ Diff
1527 5311 d 6 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5311 d 21 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5311 d 21 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5312 d 2 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff