Rev Age Author Path Log message Diff Changes
4692 2869 d 12 h kaklik /Modules/Clock/CLKGEN01B/DOC/ zrcadlen osazovak spodni strany PCB. Diff
/Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.cs.pdf
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/img/O2.png
4691 2869 d 12 h kaklik /Modules/Clock/CLKGEN01B/DOC/ Doplneni osazovaku a seznamu soucastek do dokumentace. Diff
/Modules/Clock/CLKGEN01B/DOC/SRC/img/CLKGEN01A_Bottom_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/SRC/img/CLKGEN01B_Top_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/SRC/img/DG8SAQ_emulator_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/SRC/img/O1.png
/Modules/Clock/CLKGEN01B/DOC/SRC/img/O2.png
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN01A_Bottom_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN01B_Top_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator_Big.jpg
/Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.cs.pdf
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex
3590 3750 d 8 h kaklik /Modules/ zaznam nalezenych chyb. Diff
/Modules/ADconverters/ADCdual01A/TODO.txt
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex
1953 4818 d 3 h kaklik /Modules/Clock/CLKGEN01B/DOC/SRC/ prejmenovani podle konvence Diff
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator.cs.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator.tex
1840 4885 d 0 h kaklik / aktualizace dokumentce. Diff
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.pdf
/Designs/HAM Constructions/SDRX01B/DOC/SRC/SDRX01B.tex
/Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.pdf
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN01B_Top_Big.jpg
1839 4885 d 4 h kaklik /Modules/Clock/CLKGEN01B/ zacatek dokumentace Diff
/Modules/Clock/CLKGEN01B/pdf
/Modules/Clock/CLKGEN01B/pdf/Si570.pdf
/Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.pdf
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.tex
1838 4885 d 11 h kaklik / zacatek dokumentace Diff
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.tex
/Library/Templates/LaTeX/Module_template.cs.tex