Rev Age Author Path Log message Diff
1712 5008 d 14 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5008 d 14 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1555 5153 d 14 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1545 5167 d 0 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1543 5168 d 1 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5168 d 3 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5168 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5168 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5168 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5185 d 15 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5185 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5186 d 0 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5186 d 1 h kaklik /Modules/ Diff
1526 5186 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5186 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff