Rev Age Author Path Log message Diff Changes
1711 5085 d 21 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
/Modules/Clock/CLKGEN01B
/Modules/Clock/CLKGEN01B/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01B/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01B/SCH/CLKGEN.asc
1531 5262 d 23 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1530 5263 d 6 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1529 5263 d 7 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1528 5263 d 8 h kaklik /Modules/ Diff
/Modules/Memory/SDcard01B
/Modules/Memory/SDcard01B/SCH
/Modules/Memory/SDcard01B/SCH/SDCARD.DSN
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1527 5263 d 10 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1524 5264 d 5 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
1523 5264 d 5 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1521 5267 d 1 h kaklik /Modules/ schema modulu pro generovani hodin. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
/Modules/ADconverters/ADCmonoPPI01A/SCH/ADCMONOPPI.DSN
/Modules/ADconverters/ADCmonoPPI01A/SCH/ADCmonoPPI.pdf