Rev 1711 – ?author? – ?age? (?date?)
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(root)
/
Modules
/
Clock
/
CLKGEN01B
@ 2274
Rev 1711
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Log message
Diff
1711
5081 d 17 h
kaklik
/Modules/Clock/CLKGEN01B/
uprava zemeni a rozlozeni soucastek
Diff
1691
5107 d 20 h
kaklik
/
Fifmware zeditovan tak, aby nepotreboval bootloader.
Diff
1668
5120 d 18 h
kaklik
/Modules/
nove moduly
Diff
1666
5126 d 6 h
kaklik
/Modules/
Zalozeni noveho typu modulu pro Time to Digital conversion
Diff
1661
5135 d 19 h
kaklik
/Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/
do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace.
Diff
1572
5198 d 8 h
kaklik
/
poznamky problemu
Diff
1555
5226 d 16 h
kaklik
/Modules/Clock/
pokus s ladenim delky spoju
Diff
1548
5237 d 4 h
kaklik
/Modules/Clock/
aktualizace popisu modulů.
Diff
1547
5237 d 5 h
kaklik
/Modules/Clock/CLKGEN01A/
Fotky LO.
Diff
1546
5240 d 1 h
kaklik
/Modules/Clock/CLKGEN01A/
seznam chyb.
Diff
1545
5240 d 3 h
kaklik
/Modules/Clock/CLKGEN01A/
potisk
Diff
1544
5241 d 4 h
kaklik
/
Diff
1543
5241 d 4 h
kaklik
/Modules/Clock/CLKGEN01A/
vymena CAM vystupu
Diff
1542
5241 d 5 h
kaklik
/Modules/Clock/CLKGEN01A/
generovani technologickych dat.
Diff
1541
5241 d 18 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1540
5241 d 18 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1539
5241 d 18 h
kaklik
/Modules/Clock/CLKGEN01A/PCB/
Diff
1531
5258 d 18 h
kaklik
/Modules/Clock/CLKGEN01A/
pridani chybejicich terminacnich odporu..
Diff
1530
5259 d 1 h
kaklik
/Modules/Clock/CLKGEN01A/
Temer konecna verze PCB pro Si570. Respektive Si5XX
Diff
1529
5259 d 2 h
kaklik
/Modules/Clock/CLKGEN01A/
Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru.
Diff