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Rev Age Author Path Log message Diff
1551 5227 d 12 h kaklik / prvni SDR konstrukce. Diff
1548 5236 d 16 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5236 d 16 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5239 d 13 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5239 d 14 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5240 d 15 h kaklik / Diff
1543 5240 d 16 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5240 d 17 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5241 d 5 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5241 d 6 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5241 d 6 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5244 d 6 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5244 d 13 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5245 d 3 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1531 5258 d 5 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5258 d 13 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5258 d 14 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5258 d 15 h kaklik /Modules/ Diff
1527 5258 d 17 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5259 d 7 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff