| 3730 |
3673 d 0 h |
jacho |
/Modules/Clock/CLKDIV01A/ |
|
Diff |
| /Modules/Clock/CLKDIV01A/PrjInfo.txt |
|
| 3678 |
3802 d 12 h |
roman |
/Modules/Clock/CLKGEN01B/FZP/ |
add FRITZING part - CLKGEN01B |
Diff |
| /Modules/Clock/CLKGEN01B/FZP/CLKGEN01B.fzpz |
|
| 3677 |
3802 d 18 h |
roman |
/Modules/Clock/CLKDIV01A/FZP/ |
add fritzing CLKDIV01A |
Diff |
/Modules/Clock/CLKDIV01A/FZP
/Modules/Clock/CLKDIV01A/FZP/CLKDIV01A.fzpz |
|
| 3620 |
3858 d 22 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
aktualizace dokumentacniho PDF od modulu. |
Diff |
| /Modules/Clock/CLKDIV01A/SCH/navrh.PDF |
/Modules/Clock/CLKDIV01A/DOC/CLKDIV01A.cs.pdf
/Modules/Clock/CLKDIV01A/DOC/SRC/CLKDIV01A.cs.tex |
|
| 3592 |
3874 d 20 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
Opraveno oznaceni 1 u integrovaneh oobvodu. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/O2.pdf
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
| 3590 |
3876 d 17 h |
kaklik |
/Modules/ |
zaznam nalezenych chyb. |
Diff |
/Modules/ADconverters/ADCdual01A/TODO.txt
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex |
|
| 3509 |
3901 d 15 h |
kaklik |
/Modules/ |
pregenerovani dokumentace. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/O1.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/O2.pdf
/Modules/Sensors/IUC01A/CAM_DOC/O1.pdf
/Modules/Sensors/IUC01A/CAM_DOC/O2.pdf
/Modules/Sensors/IUC01A/CAM_DOC/V2.pdf |
/Modules/ADconverters/ADCmonoSPI01B/CAM_DOC/O1.pdf
/Modules/ADconverters/ADCmonoSPI01B/CAM_DOC/O2.pdf
/Modules/ADconverters/ADCmonoSPI01B/PCB/ADCMONOSPI.pcb
/Modules/ADconverters/ADCmonoSPI01B/SCH/ADCmonoSPI01B.pdf
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.DSN
/Modules/Clock/CLKDIV01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V1.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V2.pdf
/Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/TODO.txt
/Modules/Sensors/IUC01A/CAM_DOC/V1.pdf
/Modules/Sensors/IUC01A/PCB/IUC01.pcb |
|
| 3507 |
3902 d 9 h |
kaklik |
/Modules/ |
založen nový modul pro digitalizaci signálu z SDRX01B. |
Diff |
/Modules/Audio/ADCaudio01A
/Modules/Audio/ADCaudio01A/CAM_AMA
/Modules/Audio/ADCaudio01A/CAM_DOC
/Modules/Audio/ADCaudio01A/CAM_PROFI
/Modules/Audio/ADCaudio01A/CAM_PROFI/Preview.gvp
/Modules/Audio/ADCaudio01A/DOC
/Modules/Audio/ADCaudio01A/DOC/HTML
/Modules/Audio/ADCaudio01A/DOC/SRC
/Modules/Audio/ADCaudio01A/PCB
/Modules/Audio/ADCaudio01A/PrjInfo.txt
/Modules/Audio/ADCaudio01A/SCH
/Modules/Audio/ADCaudio01A/SW
/Modules/Audio/ADCaudio01A/pdf |
| /Modules/Clock/CLKDIV01A/PrjInfo.txt |
|
| 3490 |
3915 d 15 h |
miho |
/ |
Doplněna dokumentace firmwaru USBasp pro modul AVRUSB01, drobné opravy |
Diff |
/Modules/AVR/AVRUSB01A/DOC/FW_USBasp.cs.pdf
/Modules/AVR/AVRUSB01A/DOC/HTML/AVRUSB01A.cs.html
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp.cs.html
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp_soubory
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp_soubory/image001.jpg
/Modules/AVR/AVRUSB01A/DOC/SRC/FW_USBasp.cs.doc
/Modules/Clock/CLK1PLL01A/pdf/cdce913.pdf |
/Modules/AVR/AVRUSB01A/DOC/HTML/AVRUSB01A.cs.htm
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf |
/Modules/AVR/AVRUSB01A/SW/fw_usbasp/Makefile
/Web/CSS/MLAB.css |
|
| 3475 |
3920 d 14 h |
kaklik |
/ |
Pridani dalsi dokumentace. |
Diff |
/Designs/Measuring_instruments/AWS01B/SW/PIC16F887/i2c_wind_sensor/main.hex
/Modules/Clock/CLKDIV01A/DOC/SRC/CLKDIV01A.cs.tex |
|
| 3459 |
3928 d 19 h |
kaklik |
/ |
pridani obrazku nove vyvijenych konstrukci. |
Diff |
/Designs/Measuring_instruments/RMDS01C/DOC/SRC/img/Sync_prototype.JPG
/Modules/Clock/CLKGEN01B/DOC/SRC/img/CLKGEN01B_connection_Big.jpg |
|
| 3447 |
3947 d 17 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
pradani maleho obrazku modulu. |
Diff |
| /Modules/Clock/CLKDIV01A/CLKDIV01A_Top_Small.jpg |
|
| 3445 |
3947 d 18 h |
kaklik |
/ |
zlepseni dokumentace modulu. |
Diff |
/Modules/ADconverters/ACOMP01A/DOC/SRC/img
/Modules/ADconverters/ACOMP01A/DOC/SRC/img/ACOMP01A_QRcode.png
/Modules/ADconverters/ADCdual01A/DOC/SRC/img
/Modules/ADconverters/ADCdual01A/DOC/SRC/img/ADCdual01A_QRcode.png
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img/S6AN01A_QRcode.png
/Modules/Clock/CLK1PLL01A/DOC/SRC
/Modules/Clock/CLK1PLL01A/DOC/SRC/img
/Modules/Clock/CLK1PLL01A/DOC/SRC/img/CLK1PLL01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/CLKDIV01A.cs.pdf
/Modules/Clock/CLKDIV01A/DOC/SRC/img
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_Top_Big.jpg
/Modules/CommRF/FORX01A/DOC/SRC/img
/Modules/CommRF/FORX01A/DOC/SRC/img/FORX01A_QRcode.png
/Modules/CommRF/FOTX01A/DOC/SRC/img
/Modules/CommRF/FOTX01A/DOC/SRC/img/FOTX01A_QRcode.png
/Modules/CommSerial/USBI2C01A/DOC/SRC/img
/Modules/CommSerial/USBI2C01A/DOC/SRC/img/USBI2C01A_QRcode.png
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Top_Big.jpg
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img/BATPOWER04A_QRcode.png
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img/BATPOWER04B_QRcode.png
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img/CHPUMP01A_QRcode.png
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img/TPS63060V01A_QRcode.png
/Modules/Sensors/RPS01A/DOC/SRC/img
/Modules/Sensors/RPS01A/DOC/SRC/img/RPS01A_QRcode.png
/Modules/Universal/UNISERIAL01A/DOC/SRC/img
/Modules/Universal/UNISERIAL01A/DOC/SRC/img/UNISERIAL01A_QRcode.png |
/Modules/Clock/CLKDIV01A/SW
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Top_Big.jpg |
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.cs.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/Clock/CLKDIV01A/PrjInfo.txt
/Modules/Measuring/GPS01A/TODO.txt
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png |
|
| 3444 |
3947 d 18 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
zaznam chyb na modulu. |
Diff |
| /Modules/Clock/CLKDIV01A/TODO.txt |
|
| 3431 |
3952 d 16 h |
miho |
/Modules/Clock/CLK1PLL01A/SCH/ |
|
Diff |
| /Modules/Clock/CLK1PLL01A/SCH/!____!.txt |
|
| 3430 |
3952 d 17 h |
miho |
/Modules/Clock/CLK1PLL01A/SCH/ |
Doplněn komentář. |
Diff |
| /Modules/Clock/CLK1PLL01A/SCH/!____!.txt |
|
| 3429 |
3952 d 19 h |
miho |
/Modules/Clock/CLK1PLL01A/ |
Dogenerované PDF soubory |
Diff |
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf |
|
| 3428 |
3953 d 0 h |
miho |
/Modules/Clock/CLK1PLL01A/ |
Opraven SCH a PCB CLK1PLL01A (oprava EN vývodů u stabilizátorů), nutno ještě přegenerovat PDF výstupy od plošného spoje (zde PDF995 generuje velmi nekvalitní výstupy, nutno použít něco funkčnějšího). |
Diff |
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf |
|
| 3427 |
3954 d 19 h |
kaklik |
/ |
vylepseni dokumentace studie prijimace |
Diff |
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.png
/Modules/Clock/CLK1PLL01A/pdf
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf |
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png |
|
| 3425 |
3956 d 11 h |
kaklik |
/ |
pridani dalsi dokumentace. |
Diff |
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf/ADuM3190.pdf
/Modules/CPLD_FPGA/S6AN01A/pdf/HDMI_connector.pdf
/Modules/Sensors/ALTIMET01A/SW/Python/dpi145_test.py |
/Modules/Clock/CLKDIV01A/TODO.txt
/Modules/Clock/CLKGEN01B/pdf/Si570.pdf
/Modules/CommSerial/I2CHUB02A/TODO.txt
/Modules/H_Bridge/DRV8835HB01A/TODO.txt
/Modules/Measuring/GPS01A/TODO.txt |
|