Rev Age Author Path Log message Diff
1871 4947 d 19 h kaklik /Modules/CommSerial/ETH01A/ vygenerovani zakladni obrazkove dokumentace. Diff
1855 4951 d 19 h kaklik /Modules/CommSerial/ETH01A/PCB/ Dokončena hlavní část návrhu PCB. Diff
1851 4952 d 20 h kaklik /Modules/CommSerial/ETH01A/ pokracovani v navrhu PCB pro ethernet. Diff
1850 4952 d 21 h kaklik /Modules/CommSerial/ETH01A/PCB/ Diff
1849 4952 d 22 h kaklik /Modules/CommSerial/ETH01A/PCB/ pokracovani v navrhu PCB pro ethernet. Diff
1848 4952 d 23 h kaklik /Modules/CommSerial/ETH01A/ vyreseno krizeni spoju Diff
1847 4952 d 23 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1846 4953 d 0 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1845 4953 d 0 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1844 4953 d 1 h kaklik /Modules/ Diff
1843 4953 d 2 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1842 4953 d 2 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1795 4979 d 18 h kaklik /Modules/CommSerial/ETH01A/ zacatek navrhu PCB. Diff