Rev Age Author Path Log message Diff Changes
3575 3891 d 19 h kaklik / Diff
/Designs/Laboratory_instruments/Noise_generator/DOC/P1110886.JPG
/Designs/Laboratory_instruments/Noise_generator/DOC/P1110887.JPG
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.kicad_pcb
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-NPTH.drl
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF.drl
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3574 3892 d 1 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ pridani popisku ke konektorum. Optimalizace zapojeni konektoru ve schema. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
3570 3892 d 16 h kaklik /Modules/Universal/FMC2DIFF01A/ zmena zapojeni PECL vystupu. Diff
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-NPTH.drl
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF.drl
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3555 3895 d 20 h kaklik /Modules/Universal/FMC2DIFF01A/ navrh prototypu. Diff
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-B_Cu.gbl
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-B_Mask.gbs
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-B_SilkS.gbo
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-Edge_Cuts.gbr
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-F_Cu.gtl
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-F_Mask.gts
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-F_SilkS.gto
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF-NPTH.drl
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/FMC2DIFF.drl
/Modules/Universal/FMC2DIFF01A/SCH_PCB/konektory.dcm
/Modules/Universal/FMC2DIFF01A/pdf/674911030.igs
/Modules/Universal/FMC2DIFF01A/CAM_PROFI/Preview.gvp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3554 3896 d 1 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ prvni celkem rozumny plosny spoj. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/konektory.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3550 3896 d 15 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ optimalizace zapojeni. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3549 3896 d 16 h kaklik /Modules/Universal/FMC2DIFF01A/ optimalizace zapojeni a zmenseni plosek FMC konektoru. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/konektory.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
/Modules/Universal/FMC2DIFF01A/TODO.txt
3546 3897 d 19 h kaklik / postup v navrhu modulu. Diff
/Modules/Universal/FMC2DIFF01A/TODO.txt
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
/Web/Downloads.cs.html
3544 3898 d 1 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ 1. optimalizace zapojeni konektoru. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3539 3899 d 15 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ aktualizace schema. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3536 3899 d 20 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ zacatek kresleni schema. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/diff_connectors.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro