Rev Age Author Path Log message Diff Changes
3546 3901 d 13 h kaklik / postup v navrhu modulu. Diff
/Modules/Universal/FMC2DIFF01A/TODO.txt
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
/Web/Downloads.cs.html
3544 3901 d 19 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ 1. optimalizace zapojeni konektoru. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3539 3903 d 9 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ aktualizace schema. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.cmp
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3538 3903 d 11 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ zakladni zapojeni konektoru. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/konektory.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3531 3905 d 12 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ provedeno ocislovani soucastek ve schematu. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3530 3905 d 14 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ oprava chyby ztraty cislovani pri vytvoreni nove stranky. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
3529 3905 d 15 h kaklik /Modules/Universal/FMC2DIFF01A/SCH_PCB/ prestehovani schemat do vice stranek. Diff
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.pro
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.sch