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Rev Age Author Path Log message Diff
1541 5242 d 21 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5242 d 21 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5242 d 21 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5245 d 22 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5246 d 4 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5246 d 18 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5256 d 1 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5256 d 1 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5256 d 2 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5259 d 21 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5260 d 4 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5260 d 5 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5260 d 6 h kaklik /Modules/ Diff
1527 5260 d 8 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5260 d 22 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5260 d 23 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5261 d 3 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5261 d 3 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
1522 5262 d 1 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
1521 5263 d 23 h kaklik /Modules/ schema modulu pro generovani hodin. Diff