←Prev12Next→ Show All
Rev Age Author Path Log message Diff
1744 4924 d 7 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 4925 d 8 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 4925 d 18 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 4925 d 20 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 4926 d 17 h kakl /Modules/ opravy PCB Diff
1739 4927 d 8 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 4928 d 9 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 4928 d 9 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 4928 d 11 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 4930 d 18 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 4940 d 15 h kaklik / Opravy a doplneni Diff
1717 4941 d 9 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 4941 d 16 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 4941 d 23 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 4942 d 19 h kaklik / priprava novych modulu. Diff
1712 4943 d 9 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 4943 d 9 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1708 4944 d 17 h mija /Modules/ARM/STM32F10xRxT/ Diff
1707 4944 d 18 h mija /Modules/ARM/STM32F10xRxT/ uprava modulu ARM Diff
1704 4945 d 17 h kaklik /Modules/TDC/GP201A/ vygenerovani vystupu pro vyrobu PCB. Diff