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Rev Age Author Path Log message Diff Changes
1759 5066 d 15 h kakl /Modules/TDC/GP201A/SW/PICinterface/ implementace MR2. TDC ale nereaguje na stop impuls. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1758 5066 d 18 h kakl /Modules/TDC/GP201A/SW/PICinterface/ znicializovany nastaveni registru Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1757 5066 d 20 h kakl /Modules/TDC/GP201A/SW/PICinterface/ po nadefinovani struktur pro registry se ukazalo ze nejvetsi velikost olozky struktury je 8bit. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1756 5066 d 22 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
1755 5066 d 23 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Opsano nastavebi vetsiny registru Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1754 5067 d 3 h kakl /Modules/ Diff
/Modules/PIC/PIC18F8xTQ8001A/SW
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.bak
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.c
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.cof
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.err
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.esym
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.h
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.hex
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.lst
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.pjt
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.sta
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.sym
/Modules/PIC/PIC18F8xTQ8001A/SW/PIC18F8310/blik.tre
/Modules/TDC/GP201A/SW/PICinterface/main.h
/Modules/TDC/GP201A/SW/PICinterface/main.pjt
1753 5067 d 21 h kakl /Modules/TDC/GP201A/SW/PICinterface/ zakonzervovani kodu pred vytvorenim funkci pro nastaveni TDC. Diff
/Modules/TDC/GP201A/SW/PICinterface/main.h
1751 5069 d 20 h kaklik / zaznam nalezenych chyb Diff
/Designs/MRAKOMER4/TODO.txt
/Modules/CommSerial/USB232R01B/SCH/USB232R01B_BOM.xls
1745 5072 d 21 h kakl /Modules/TDC/GP201A/SW/PICinterface/ prvni verze funkcni komunikace s TDC. Zbyva doresit nastavovani registru. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.h
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt
1744 5073 d 14 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
/Modules/TDC/GP201A/SW/PICinterface
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.h
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt
/Modules/TDC/GP201A/PCB/GP2.pcb
1743 5074 d 14 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
/Modules/CommSerial/ETH01A
/Modules/CommSerial/ETH01A/SCH
/Modules/CommSerial/ETH01A/SCH/ETH01.DSN
/Modules/CommSerial/ETH01A/SCH/ETH01.opj
1742 5075 d 0 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
/Modules/ADconverters/ADCmonoPPI01A/TODO.txt
1741 5075 d 3 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
/Modules/PIC/PIC18F8xTQ8001A/CAM_DOC/O1.pdf
/Modules/PIC/PIC18F8xTQ8001A/CAM_DOC/O2.pdf
/Modules/PIC/PIC18F8xTQ8001A/PCB/PIC18F8xTQ8001A.pcb
1740 5075 d 23 h kakl /Modules/ opravy PCB Diff
/Modules/PIC/PIC18F4550v01A/TODO.txt
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb
1739 5076 d 15 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb
/Modules/ARM/STM32F10xRxT/PrjInfo.txt
/Modules/ARM/STM32F10xRxT/opravit.txt
1738 5077 d 15 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb
1737 5077 d 16 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb
/Modules/ARM/STM32F10xRxT/SCH/STM32F10XRXT.DSN
1736 5077 d 17 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
/Modules/ARM/STM32F10xRxT/PCB/STM32F10XRXT.pcb
/Modules/ARM/STM32F10xRxT/SCH/STM32F10XRXT.DSN
1727 5080 d 0 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
/Modules/ARM/STM32F10xRxT/PrjInfo.txt
1718 5089 d 21 h kaklik / Opravy a doplneni Diff
/Designs/HAM Constructions/SDRX01A/DOC/SDRX01A.pdf
/Designs/HAM Constructions/SDRX01A/DOC/SRC/SDRX01A.tex
/Designs/HAM Constructions/SDRX01A/TODO.txt
/Modules/Clock/CLKGEN01B/opravit.txt