←Prev12Next→ Show All
Rev Age Author Path Log message Diff
1744 5011 d 17 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 5012 d 18 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 5013 d 4 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 5013 d 6 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 5014 d 3 h kakl /Modules/ opravy PCB Diff
1739 5014 d 18 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 5015 d 18 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 5015 d 19 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 5015 d 20 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 5018 d 4 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 5028 d 1 h kaklik / Opravy a doplneni Diff
1717 5028 d 19 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 5029 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 5029 d 9 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 5030 d 4 h kaklik / priprava novych modulu. Diff
1712 5030 d 18 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5030 d 18 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1708 5032 d 3 h mija /Modules/ARM/STM32F10xRxT/ Diff
1707 5032 d 3 h mija /Modules/ARM/STM32F10xRxT/ uprava modulu ARM Diff
1704 5033 d 3 h kaklik /Modules/TDC/GP201A/ vygenerovani vystupu pro vyrobu PCB. Diff