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Rev Age Author Path Log message Diff
1870 5010 d 5 h kaklik /Modules/PIC/PIC16F87xTQ4401B/ pridani spravne cesty Diff
1866 5010 d 7 h kaklik / vytvořena buňka s okkazem do obchodu. Diff
1863 5010 d 15 h kaklik /Modules/Clock/CLKGEN01B/DOC/ napsan clanek o pripojeni CLKGEN k pocitaci. Diff
1856 5012 d 12 h kaklik /Modules/ARM/STM32F10xRxT/ pridani fotky ARMu Diff
1855 5014 d 4 h kaklik /Modules/CommSerial/ETH01A/PCB/ Dokončena hlavní část návrhu PCB. Diff
1854 5014 d 16 h kaklik / drobná SEO oprimalizace podle návrhu google. Diff
1852 5015 d 5 h kaklik /Modules/CommSerial/ETH01A/SCH/ Diff
1851 5015 d 5 h kaklik /Modules/CommSerial/ETH01A/ pokracovani v navrhu PCB pro ethernet. Diff
1850 5015 d 6 h kaklik /Modules/CommSerial/ETH01A/PCB/ Diff
1849 5015 d 6 h kaklik /Modules/CommSerial/ETH01A/PCB/ pokracovani v navrhu PCB pro ethernet. Diff
1848 5015 d 7 h kaklik /Modules/CommSerial/ETH01A/ vyreseno krizeni spoju Diff
1847 5015 d 7 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1846 5015 d 8 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1845 5015 d 9 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1844 5015 d 10 h kaklik /Modules/ Diff
1843 5015 d 11 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1842 5015 d 11 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1841 5016 d 4 h kaklik /Modules/Clock/CLKGEN01B/DOC/ aktualizace dokumentce. Diff
1840 5016 d 4 h kaklik / aktualizace dokumentce. Diff
1839 5016 d 8 h kaklik /Modules/Clock/CLKGEN01B/ zacatek dokumentace Diff