←Prev12Next→ Show All
Rev Age Author Path Log message Diff
2549 4447 d 2 h jacho /Modules/H_Bridge/HBSTEP01A/DOC/ Diff
2548 4447 d 2 h jacho /Modules/H_Bridge/HBSTEP01A/ Diff
2547 4447 d 6 h jacho /Modules/Universal/ Diff
2546 4447 d 6 h jacho /Modules/Universal/ Diff
2545 4447 d 7 h jacho /Modules/Universal/ALBASE1115/ Diff
2543 4452 d 21 h kaklik /Modules/CommSerial/USB232R01B/SW/FT_prog/ vytvoreni vzoru pro obsah EEPROM usb prevodniku. Diff
2542 4453 d 20 h jacho /Modules/Universal/ALBASE1115/ Diff
2541 4453 d 20 h kaklik /Modules/PowerSW/LDD01A/ informace k novym modulum. Diff
2540 4453 d 21 h jacho /Modules/Universal/ALBASE1521/ Diff
2539 4453 d 21 h jacho /Modules/Universal/ Diff
2538 4453 d 22 h jacho /Modules/Universal/ALBASE1521/ Diff
2537 4453 d 22 h jacho /Modules/Universal/ALBASE1521/ Diff
2536 4453 d 23 h jacho /Modules/Universal/ALBASE1521/ Diff
2534 4456 d 4 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/src/ Pridano generovani baliku pulzu a prepinatelna opakovaci frekvence na DOPSW. Vynulovani na TL. Diff
2533 4456 d 4 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/ Pridano automaticke verzovani. Diff
2532 4457 d 3 h kaklik /Modules/PowerSW/LDD01A/SCH/ pregenerovani schema. Diff
2531 4457 d 3 h kaklik /Modules/PowerSW/LDD01A/ vygenerovany technologicke vystupy Diff
2528 4460 d 19 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/ Pulzni generator.
Prvni funkcni verze.
Prekryvajici se impulzy 10ns az 2us.
Opakovaci frekvence cca 1,6kHz.		 Diff
2526 4466 d 20 h kaklik / pridani noveho fontu. Diff
2525 4467 d 20 h kaklik /Modules/PowerSW/LDD01A/CAM_PROFI/ vylepseni layoutu pro osazovani bez masky.. Diff