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Rev Age Author Path Log message Diff
1551 5047 d 11 h kaklik / prvni SDR konstrukce. Diff
1548 5056 d 15 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5056 d 15 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5059 d 12 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5059 d 13 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5060 d 14 h kaklik / Diff
1543 5060 d 15 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5060 d 16 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5061 d 4 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5061 d 5 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5061 d 5 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5064 d 5 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5064 d 12 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5065 d 2 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5074 d 9 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5074 d 9 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5074 d 9 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5078 d 4 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5078 d 12 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5078 d 13 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff